Instruction manual

6–16
Principles of Operation
♦ Less than 0.02V common mode ripple, measured between chassis ground
and the ground pins of the interface ICs.
♦ Less than 200V/s slew rate for all outputs.
Engine Controller
The engine controller (EC) consists of four main elements:
♦ 80C166 Microcontroller
♦ Address Decode PAL
♦ 256KB 5.0V–only FLASH program memory, organized as 64K x 16 bits.
This memory is not expandable.
♦ MECA ASIC
80C166 Microprocessor
The Siemens SAB 80C166 is a high–integration microcontroller. It has many features
that suit it extremely well to real–time control applications. This controller provides
the functionality of three separate processors used in earlier controller board
architectures. In this manual, the 80C166 is referred to as either the EC or the 166.
The 166 used on the CMX board runs at 20MHz and is housed in a 100–pin
plastic quad flat pack.
Bus Configuration The 166 uses a configurable external bus. The bus is an
18–bit address, 16–bit data, non–multiplexed and segmented bus. The flash
memory runs at zero effective wait states.
Power Reduction Modes The 166 chip has two power reduction modes:
idle and power down. When the 166 is in idle mode the CPU shuts down, but
all on–board peripherals continue to operate. (Idle power reduction of the
166 is not the same as printer idle.) Any previously enabled interrupt will
“wake up” the processor, even if global interrupts are turned off or the
interrupt does not have the priority to actually execute. All I/O pins remain
active in idle power reduction mode. Power down reduction mode capability
exists but is not used because it requires an external hardware reset to exit
this mode.
Watchdog Timer The 166 has an on–board watchdog timer. The Address
Strobe of the 030 processor is fed into the watchdog input. If the 030 stops
fetching addresses, something is seriously wrong and the 166 and its