Instruction manual

6–14
Principles of Operation
DRAM Memory
DRAM is used for program variables, image buffers, and input buffers. All
DRAM supports page mode operation and is addressable by individual byte.
Two standard 72–pin DRAM SIMMs are used for expansion memory,
addressable to 256MB, although 16MB is the practical upper DRAM limit.
NVRAM
A 8K x 8 bit Non–Volatile battery–backed static RAM (NVRAM) device
provides for the storage of configuration and system statistical data.
VX ASIC
The VX is a multifunction custom gate array ASIC containing all the logic
for the DC that is not contained in the 68EC030 processor. The VX provides
the following services:
♦ Memory Access Controller
♦ DRAM Controller
♦ Flash Controller
♦ Two DMA Channels
♦ Operator Panel Interface
♦ “Dot Plucking” and Adjacent Dot Checking
♦ “Cajun” Bus Interface
♦ Host I/O and Diagnostic Port
Memory Access Controller All 030 addresses go through the VX ASIC.
The VX handles all address decoding, chip selects, DSACKs, and so on.
DRAM Controller The VX supports up to three banks of DRAM, including
page mode operation.
FLASH Controller The VX supports up to three banks of flash memory.
DMA Channels The VX provides two channels for direct memory access.
These channels move data from the host interface or expansion bus to the
DRAM and vice–versa. One address is an I/O address, the other is a memory
address with auto–increment.