User`s guide
Table Of Contents
- Contents
- Tables
- Preface
- Introduction
- Getting Started
- 2.1 Overview
- 2.2 Hardware Required
- 2.3 Hardware Debug Features
- 2.4 Setting Up the SROM Serial Port Connection
- 2.5 Starting and Running the Mini-Debugger
- 2.6 Sample Session on the EB64
- 2.7 Sample Session on the EB64+ and the AlphaPC 6...
- 2.8 Sample Session on the EB66 and EB66+
- 2.9 Sample Session on the EB164
- 2.10 Sample Session on the AlphaPC 164
- 2.11 Sample Session on the AlphaPC 164LX
- 2.12 Onboard Machine Check Handler
- SROM Mini-Debugger Command Set
- Support, Products, and Documentation
- Index
3–12 SROM Mini-Debugger Command Set
User Commands
dc
The deposit CPU register (dc) command changes the contents of internal CPU
registers.
Control Flags
Not applicable.
Description
The deposit CPU register command changes the contents of internal CPU registers.
These registers are CPU dependent, so command input is different for each Alpha
CPU. The following tables show the names assigned by the mini-debugger to the
CPU registers; these are the only valid names that may be entered at the IPR prompt.
Table 3–2 CPU Register Names for the dc Command
(Sheet 1 of 2)
Mini-debugger Name CPU Register Name Description
21164
BCtl* BC_CONTROL Bcache control
BCfg* BC_CONFIG Bcache configuration
Icsr ICSR Ibox control and status
PalB PAL_BASE PAL base address
DcMd DC_MODE Dcache mode
Ipl IPLR Interrupt priority level
21064
BCtl* BC_CONTROL Bcache control
Abox* ABOX_CTL Abox control
Icsr ICSR Ibox control and status
PalB PAL_BASE PAL base address