User`s guide
Table Of Contents
- Contents
- Tables
- Preface
- Introduction
- Getting Started
- 2.1 Overview
- 2.2 Hardware Required
- 2.3 Hardware Debug Features
- 2.4 Setting Up the SROM Serial Port Connection
- 2.5 Starting and Running the Mini-Debugger
- 2.6 Sample Session on the EB64
- 2.7 Sample Session on the EB64+ and the AlphaPC 6...
- 2.8 Sample Session on the EB66 and EB66+
- 2.9 Sample Session on the EB164
- 2.10 Sample Session on the AlphaPC 164
- 2.11 Sample Session on the AlphaPC 164LX
- 2.12 Onboard Machine Check Handler
- SROM Mini-Debugger Command Set
- Support, Products, and Documentation
- Index
2–40 Getting Started
Sample Session on the AlphaPC 164LX
V00001f01
SROM> dm
! SC_CTL register.
A> fffff000a8
D> 3002
SROM> em ! Check previous write operation.
A> fffff000a8
000000ff.fff000a8:00003002
SROM> dc
! Disable the Bcache and turn off
IPR> bctl
! error reporting.
D> 8040
*BCTL 00000000.00008040
! The read and write speeds in the Bcache Cfg register are set
! using the table based on the CPU speed. This example is for 466 MHz.
SROM> dc
IPR> bcfg
D> 3f346a2
*BCFG 00000000.03f346a2
SROM> dm
! Set the control register.
A> 8740000100
D> f1
SROM> dm ! Set the flash control register.
A> 8740000200
D> 0
SROM> dm ! Set CCR (clock control register).
A> 8780000000
D> 029040631
SROM> dm ! Set GTR (global timing register).
A> 8750000200
D> 332
SROM> dm ! Set RTR (refresh timing register).
A> 8750000300
D> 750