User`s guide
Table Of Contents
- Contents
- Tables
- Preface
- Introduction
- Getting Started
- 2.1 Overview
- 2.2 Hardware Required
- 2.3 Hardware Debug Features
- 2.4 Setting Up the SROM Serial Port Connection
- 2.5 Starting and Running the Mini-Debugger
- 2.6 Sample Session on the EB64
- 2.7 Sample Session on the EB64+ and the AlphaPC 6...
- 2.8 Sample Session on the EB66 and EB66+
- 2.9 Sample Session on the EB164
- 2.10 Sample Session on the AlphaPC 164
- 2.11 Sample Session on the AlphaPC 164LX
- 2.12 Onboard Machine Check Handler
- SROM Mini-Debugger Command Set
- Support, Products, and Documentation
- Index
Getting Started 2–33
Sample Session on the AlphaPC 164
SROM> dm ! Set Bank Timing Register #1.
A> b40
D> 60208142
! In AlphaPC 164, all 8 memory address registers (MBAs) must
! be programmed. The first 4 cover side 0 of the
! SIMMs and the last 4, side 1 (if present). In this
! example all 8 SIMMs fully populated with 2Mbx36 SIMMs
! (8MBytes SIMMs) which gives a total of 64MBs. The
! first 4 MBA registers cover side 0, whose base address
! (bits 25:16) is 0. Side 1’s base address is half
! the total memory size (32MB = 0x200000) and hence
! bits 25:16 are programmed with 0x2.
SROM> dm
A> 600 ! MBA0.
D> 11
SROM> dm
A> 680 ! MBA2.
D> 11
SROM> dm
A> 700 ! MBA4.
D> 11
SROM> dm
A> 780 ! MBA6.
D> 11
SROM> dm
A> 800 ! MBA8.
D> 20011
SROM> dm
A> 880
! MBAA.
D> 20011
SROM> dm
A> 900
! MBAC.
D> 20011