User`s guide

2–30 Getting Started
Sample Session on the AlphaPC 164
8. Wake up the memory by performing eight consecutive RAS cycles to each
SIMM side. This can also be done by writing to the entire memory range.
9. Turn on Dcache, Bcache, and all three sets in the secondary cache.
10. Initialize memory and the caches by writing to memory.
11. At this point, memory initialization is complete. If you want to perform I/O
tests, then you need to initialize that part of the system and:
a. Reset the ISA bus.
b. Configure SIO, enabling accesses to RTC, configuration RAM
(configuration jumpers), and flash ROM space.
c. Initialize the RTC clock in the SMC chipset.
SIMM
Density
SIMM
Size Sides
128-bit
Memsize Mask
Row
Type
MBA
Value
[15:00]
Wrap/Side 2
Addresses
1M×36 4MB 1 16MB 00000 10×10 0001 0×100000
2M×36 8MB 2 32MB 00000 10×10 0001 0×100000
/16MB
4M×36 16MB 1 64MB 00011 11×11 0033 0×200
8M×36 32MB 2 128MB 00011 11×11 0033 0×200/64MB
16M×36 64MB 1 256MB 01111 12×12 00F5 0×100
32M×36 128MB 2 512MB 01111 12×12 00F5 0×100/256MB
SIMM
Density
SIMM
Size Sides
128-bit
Memsize Mask
Row
Type
MBA
Value
[15:00]
Wrap/Side 2
Addresses
1M×36 4MB 1 32MB 00001 10×10 0011 0×100000
2M×36 8MB 2 64MB 00001 10×10 0011 0×100000
/16MB
4M×36 16MB 1 128MB 00111 11×11 0073 0×200
8M×36 32MB 2 256MB 00111 11×11 0073 0×200/64MB
16M×36 64MB 1 512MB 11111 12×12 01F5 0×100
32M×36 128MB 2 1GB 11111 12×12 01F5 0×100/256MB