User`s guide
Table Of Contents
- Contents
- Tables
- Preface
- Introduction
- Getting Started
- 2.1 Overview
- 2.2 Hardware Required
- 2.3 Hardware Debug Features
- 2.4 Setting Up the SROM Serial Port Connection
- 2.5 Starting and Running the Mini-Debugger
- 2.6 Sample Session on the EB64
- 2.7 Sample Session on the EB64+ and the AlphaPC 6...
- 2.8 Sample Session on the EB66 and EB66+
- 2.9 Sample Session on the EB164
- 2.10 Sample Session on the AlphaPC 164
- 2.11 Sample Session on the AlphaPC 164LX
- 2.12 Onboard Machine Check Handler
- SROM Mini-Debugger Command Set
- Support, Products, and Documentation
- Index
2–24 Getting Started
Sample Session on the EB164
SROM> dm ! Set the CIA_CTRL register.
A> 8740000100
D> 2100c0f1
SROM> dm ! Set the PCI timer register.
A> 87400000C0
D> ff00
! Set the CIA_CACK_EN register. Note that the
! Bcache victim bit has been set to 0 since the
! Bcache has been disabled.
SROM> dm
A> 8740000600
D> 0
SROM> sb ! Set base address for memory controller.
A> 8750000000
00000087.50000000
BaseAddr ON
SROM> dm
! Set the refresh rate, Bcache size to 0 (disabled)
A> 0
! and memory width to 256-bits.
D> 1fe01
SROM> dm ! Set Bank Timing Register 1.
A> b40
D> 60208140
! Set MBA0 which controls the only memory bank on
! EB164. This example applies to all 8 SIMMs fully
! populated with 2Mbx36 SIMMs (8MBytes SIMMs) which
! gives a total of 64MBs. See table for other values.
SROM> dm
A> 600
D> 10008011
SROM> ba
00000087.50000000
BaseAddr OFF
! Perform 8 consecutive RAS cycles to “wake up” memory.