User`s guide
Table Of Contents
- Contents
- Tables
- Preface
- Introduction
- Getting Started
- 2.1 Overview
- 2.2 Hardware Required
- 2.3 Hardware Debug Features
- 2.4 Setting Up the SROM Serial Port Connection
- 2.5 Starting and Running the Mini-Debugger
- 2.6 Sample Session on the EB64
- 2.7 Sample Session on the EB64+ and the AlphaPC 6...
- 2.8 Sample Session on the EB66 and EB66+
- 2.9 Sample Session on the EB164
- 2.10 Sample Session on the AlphaPC 164
- 2.11 Sample Session on the AlphaPC 164LX
- 2.12 Onboard Machine Check Handler
- SROM Mini-Debugger Command Set
- Support, Products, and Documentation
- Index
2–12 Getting Started
Sample Session on the EB64+ and the AlphaPC 64
D> 2684
SROM> dm ! Init Bank 0 Timing Register B.
A> e00
D> c01
SROM> dm ! Set Bank 0 Base Address Reg to 0.
A> 800
D> 0
SROM> dm ! Init Bank 0 Configuration Register
A> a00
! to 32MB of memory.
D> eb
SROM> ba ! Disable use of base address.
00000001.80000000
BaseAddr OFF
SROM> fm
! Write good data and parity to all of
A> 0
! memory.
A> 2000000
! Total memory size = 32MB.
D> 0
! At this point the memory subsystem has been initialized and configured
! for a 32MB in bank 0 using 2Mbx36 SIMMS. The BCache and DCache are off.
SROM> wa
Wrt Addr ON
SROM> mt
! Perform memory test.
A> 0
A> 2000000 ! Total memory size = 32MB.
SROM> wa
Wrt Addr OFF
! Initialize the BCache and DCache.
SROM> ba
00000001.80000000
BaseAddr ON
SROM> dm
! Write General Control Register.