Technical data

BIOS and System Programming

CP 486 ⋅ 00/14 VIPA GmbH 77

4.3.8.5 Configuration Example: Bank Operation via Highest Bank Address

Configuration:

Number of banks: 8

Bank capacity: 256 Byte

PLC initial address of the bank: 0000(hex)

Specified bank numbers: 80 .. 87 (Note: the first number must be a multiple

of the number of banks.)

Bank selection in the PLC: highest bank byte 00FF(hex) with data bit 7 to 0 (If data

bit 7is set to 1, the bank element itself is responded)

Ident register (C800:1F80): 57(hex) (corresponds to the highest bank number)

Bank initial register 1 (C800:1F84): 00(hex)

Bank initial register 2 (C800:1F86): 0E(hex)

Configuration register (C800:1F82): AF(hex)

Interrupt reset register (C800:1F8E): 00(hex)

Interrupt in the CP486:

In the CP486 an interrupt is initiated by an PLC write access to the highest

bank element at address 00FF(hex).

Address assignment:

Bank PLC address CP486 address

80 0000 - 00FF C800:3C00 - C800:3CFF

81 0000 - 00FF C800:3800 - C800:38FF

82 0000 - 00FF C800:3400 - C800:34FF

83 0000 - 00FF C800:3000 - C800:30FF

84 0000 - 00FF C800:2C00 - C800:2CFF

85 0000 - 00FF C800:2800 - C800:28FF

86 0000 - 00FF C800:2400 - C800:24FF

87 0000 - 00FF C800:2000 - C800:20FF