Technical data

BIOS and System Programming
CP 486 ⋅ 00/14 VIPA GmbH 75
4.3.8.3 Configuration Example: Standard CP BankOperation (8 Banks with each 1KByte)
Configuration:
Number of banks: 8
Bank capacity: 1024 Byte
PLC initial address of the bank: F400(hex) (Note: the initial address must be
in the Fxxx(hex) range)
Specified bank numbers: 8 .. 15 (Note: first number must be a multiple
of the number of banks.)
Bank selection in the PLC: Bank select register FEFF(hex)
Register parameterization:
Ident register (C800:1F80): 0Fhex
Bank initial register 1 (C800:1F84): 40hex
Bank initial register 2 (C800:1F86): 01hex
Configuration register (C800:1F82): D7hex
Interrupt reset register (C800:1F8E): 00hex
Interrupt in the CP486:
In the CP486 an interrupt is initiated by an PLC write access to the highest
bank element at address F7FF(hex).
Address assignment:
Bank PLC address CP486 address
8 F400 - F7FF C800:3C00 - C800:3FFF
9 F400 - F7FF C800:3800 - C800:3BFF
10 F400 - F7FF C800:3400 - C800:37FF
11 F400 - F7FF C800:3000 - C800:33FF
12 F400 - F7FF C800:2C00 - C800:2FFF
13 F400 - F7FF C800:2800 - C800:2BFF
14 F400 - F7FF C800:2400 - C800:27FF
15 F400 - F7FF C800:2000 - C800:23FF