Specifications

smartCore Express SMA200 BIOS / BIOS
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8.6 CMOS RAM Map
Systems based on the industry-standard specification include a battery backed real-time clock (RTC) chip. This clock
contains at least 64 Bytes of non-volatile RAM. The system BIOS uses this area to store information including system
configuration and initialization parameters, system diagnostics, and the time and date. This information remains
intact even when the system is powered down.
The BIOS supports 128 Bytes of CMOS RAM. This information is accessible through I/O ports 70h and 71h. CMOS RAM
can be divided into several segments:
» Locations 00h-0Fh contain the RTC and status information
» Locations 10h-2Fh contain system configuration data
» Locations 30h-3Fh contain system BIOS-specific configuration data as well as chipset-specific information
» Locations 40h-7Fh contain chipset-specific information as well as power management configuration
parameters
The following table provides a summary of how these areas may be further divided.
Beginning Ending Checksum Description
00h 0Fh No RTC and Checksum
10h 2Dh Yes System Configuration
2Eh 2Fh No Checksum Value of 10h-2Dh
30h 33h No Standard CMOS
34h 3Fh No Standard CMOS - SystemSoft Reserved
40h 5Bh Yes Extended CMOS - Chipset Specific
5Ch 5Dh No Checksum Value of 40h-5Bh
5Eh 6Eh No Extended CMOS - Chipset Specific
6Fh 7Dh Yes Extended CMOS - Power Management
7Eh 7Fh No Checksum Value of 6Fh-7Dh
CMOS Map
Location Description
00h Time of day (seconds) specified in BCD
01h Alarm (seconds) specified in BCD
02h Time of day (minutes) specified in BCD
03h Alarm (minutes) specified in BCD
04h Time of day (hours) specified in BCD
05h Alarm (hours) specified in BCD
06h Day of week specified in BCD
07h Day of month specified in BCD
08h Month specified in BCD
09h Year specified in BCD
0Ah Status Register A
Bit 7 = Update in progress
Bits 6-4 = Time based frequency divider
Bits 3-0 = Rate selection bits that define the periodic interrupt rate and output frequency.