User`s manual

DIGITAL-LOGIC AG MSMP5 / P3 SEN/SEV Manual V1.6A
92
J21 LCD connector
VGA-LCD Interface (flatpanel signals):
Pin Signal Pin Signal
1 M / DE 2 FLM
3 Enable BKL (TTL) 4 LP
5 VCC-Panel 3.3V / 5V
(controlled by J45)
6 GND
7 Enable VEE (TTL) 8 Shift Clock
9 Enable VDD (TTL) 10 P0
11 P1 12 P2
13 P3 14 P4
15 P5 16 P6
17 P7 18 P8
19 P9 20 P10
21 P11 22 P12
23 P13 24 P14
25 P15 26 GND
27 P16 28 P17
29 P18 30 P19
31 P20 32 Activity Output 3.3V (not used)
33 P21 34 P22
35 P23 36 P24
37 P25 38 P26
39 P27 40 P28
41 P29 42 P30
43 P31 44 GND
45 P32 46 P33
47 P34 48 P35
49 VCC +5V 50 +12V (supply externally)
J46 IrDA connector (new since V3.6A)
Pin Signal Pin Signal
Pin 1 Vcc
Pin 2 IRTX Pin 60 SMC37C672
Pin 3 IRRX Pin 59 SMC37C672
Pin 4 GND
• Fast IrDA is directly connected to the SUPER I/O and drivers have to be written by the customer
• Since BIOS version V2.36, standard- IrDA can be accessed through this connector