Specifications
Multi
Slave
Product
Re£erence
Manual
Section
3
Step
5:
Veri£y
pin
19
Step
6:
Memory
Veri£ication
memory
row
and
column
addressing
by
monitoring
pin
1
on
each
AM2965
memory
driver
circuit.
Monitor
Veri£ication
and
Data
Set
Ready
(Jl-2,
J3-2,
J5-2)
MUST
be
low
for
the
monitor
to
issue
a
message
to
the
console.
Verify
that
the
PS/NET-1
card
ie
properly
con£igured
and
connected
to
the
Multi
Slave,
and
that
the
terminal's
baud
rate
is
set
to
9600.
Ensure
that
the
Mul~i
Slave
card
ia
in
a
reset-hold
condition
by
pressing
the
system
reset
button
on
the
computer's
front
panel.
Then,
using
a
moni-
tor
program
on
the
Master
Processor,
activate
the
desired
slave
CPU
by
issuing
an
OUT
<slave
command
port),40H.
The
Multi
Slave
monitor
should
issue
its
logon
message
as
described
in
Section
2
of
this
manual.
Press
any
key
on
the
slave
console
within
two
seconds
a:fter
"un-resetting"
it.
The
Multi
Slave
monitor
should
then
be
ready
to
accept
"::.~("Jmmands.
STEP
7:
Ve
r i
fit.:
d
t.i
()
n 0 f 0 t
1)
e
l'
M a J 0 r
Co
m
po
n e n t s
Verification
of
other
maJor
Multi
Slave
components
requires
de-
velopment
of
short
software
routines
which
will
provide
scope
Inops
to
support
Lhe
analysis
of
Multi
Slave
signals
some
of
the
more
commonly
required
routines
have
been
incorporated
in
the
Multi
Slave
Monitor
program.
These
tests
include
memory
and
I/O
.read
and
wr
1
te
loops.
See
t.he
moni
tor
command
lIst
:for
:further
informatiofJ.
o
q)(
F.o\ULT
ISOLATION
Page
3-2