Service manual
System Tests 119
0007 - TRDY bit in CSR stuck at 1
0008 - TRDY bit in CSR failed to set
0009 - TRDY bit in CSR failed to clear
after transmitting a character
000A - TRDY bit in CSR failed to set
after transmitting a character
000B - RDONE bit failed to set after
transmitting character in internal
loopback mode.
000C - SR bit in INT_REQ register not set
by RDONE
000D - SR bit in INT_REG register not cleared
by writing bit in INT_CLR register
000E - Character received <> ’0’ or line
number not equal expected
000F - Data valid bit not set in word read
0010 - Silo Alarm Enable failed to set in CSR
0011 - Silo Alarm failed to set after transmitting
16 characters in internal loopback
0012 - RDONE not set after 16 characters received
0013 - SR bit in INT_REQ register not set by
Silo Alarm
0014 - Silo Alarm failed to clear after reading
a character from Silo
0015 - Master clear failed to reset the DZQ
0016 - Unexpected transmit interrupt occurred with
Interrupt Mask bit cleared.
0017 - Unexpected receive interrupt occurred with
Interrupt Mask bit cleared.
** Error Codes for BASIC_INTERRUPT_TEST **
0018 - INT_MSK register bit ST failed to set
0019 - Failed to receive a transmit interrupt
001A - Transmit interrupt occurred with INT_MSK
bit ST cleared
001B - INT_MSK register bit SR failed to set
001C - Failed to receive a receive interrupt
001D - Receive interrupt occurred with INT_MSK
bit SR cleared.
** Error Codes in BREAK_DETECT_TEST **
001E - TRDY failed to set after setting
line enable for line in TCR register
** Error Codes in OUTPTR_CHAR_POLLED **
001F - TRDY failed to set in allotted time