Specifications

program would set certain function bits in the disk’s command and status
register that specify a read or write function. For this example, assume the
disk was set to read. *
Once the disk’s control registers are initialized, the disk control logic’starts
a search for the requested data. (fhe processor in the meantime has con-
tinued in its program execution.) When the disk has found the data, it
assembles the first l&bit word from the disk surface into its data register.
The disk now requests bus control via the NPR request line. The processor,
when it has completed its current bus cycle of the current instruction and
no higher NPR requests exist, grants control of the bus to the disk. The disk,
as bus master, effects a DATO bus operation, transferring the contents to
its data buffer to the core address held in its MA. The MA is now incremented
and the WC is decremented. When the DATO operation is COftydete, the disk
passively releases control of the bus.
When the second word has been assembled, the disk again requests bus
control, does a data transfer, and then releases bus control. This cycle is
repeated until the WC reaches zero. At this point, the disk has completed
the transfer that was requested.
To notify the program that the transfer is finished, the disk initiates a request
for bus control at the BR level, gains control when higher priority requests
are satisfied, and does an immediate INTR to the processor and causes the
program to branch to a specific service program (as described in the previous
example). \
Details of the INTR and PTR bus operations can be found in Appendix D.
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