Specifications

CHAPTER 8
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DESCRIPTION OF THE UNIBUS
Communication between all system units in a PDP-11 configuration is done
by a single common bus: the Unibus. All communication-both instructions
and logical operations-is defined by a set of 56 signals. This set of 56 sig
nals is used for program controlled data transfers, direct memory data trans-
fers, priority bus control, and program interrupt.
This chapter presents the concepts of the Unibus and how they affect pro-
gram software and interfacing hardware. The use of the 56 bus signals to
effect.data transfers and to control bus use is also described.
GENERAL CONCEPTS OF THE UNIBUS
There are five major aspects of the Unibus that affect both software and
hardware considerations in the PDP-11.
SINGLE BU!j-The set of 56 signals that comprise the Unibus is the one
and only bus connecting all peripheral devices, memories, and the central
processor. Thus, to every device there exists a single set of signals by which
it can be interrogated by the processor or other devices, or be used by the
device itself to transfer data to and from memory.
The processor uses this same set of signals to communicate with all mem-
ories and devices. The important point here is that the form- of the com-
munication used by processor and peripheral devices is identical. Conse-
quently; the same set of program instructions used to reference memory
is used to reference peripheral devices. (A look at the PDP-11 instruction
set will reveal that there are no explicit l/O instructions.)
Peripheral devices in a PDP-11 system are designed to respond to the Unibus
in the same manner as memory. Device status registers, device con-
trol registers, and device data registers are each assigned unique “memory”
addresses. For example, the instruction MOVB RO, PUNCH would load the
punch buffer register with an 8-bit character contained in RO. Other in-
structions would monitor the punch status and the program could deter-
mine when the punching operation was complete.
BIDIRECTIONAL BUS-Unibus bus signals are bidirectional-the signal re-
ceived as an-input can be driven as an output, as shown in Figure 8-1.
t
r--- ----- Aurn7
RECEIVE. BUS SIGNAL
DRtVE BUS StGNAL
I
I
l-
DEVtCE LDGtC
----------- J
Figure 8-l Bidirectional Nature of the Bus
MASTER-SLAVE RELATION-At any one point in time, there is one device,
called the master, that has control of the bus. The master device controls
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