Specifications

,
.
mtate Left Byte ROLB drt ’ ~
2.3~1 Q
dst
1
,
, 0 I 6 3 I t 1 I I .I 1 1 1 ’ ’ 1
15 6 5 0
Operation: as in ROL on byte operands
Condition Codes: set on the byte results as ROL
Description: Same as ROL
Arithmetic Shift Riaht Bvte ASRB dst
2.3~7
1 1 0
I 16’1 I I
2 I
I
15
6 5
0
Operation: as in ASR on byte operands
ConditionCodes: set on the byte result as ASR
Description: Same as ASR
Arithmetic Shift Left Byte ASLB dst
2.3u**
‘I 101 I I ‘61 I 131
dst
I I I I I
t5 6 5
0
Operation: as in ASL on byte operands
Condition Codes: set on the byte results as ASL
Description: Same as ASL
CONDITION CODE OPERATORS--Condition code operators set and clear con-
dition code bits. Selectable combinations of these bits may be cleared or set
.
together in one instruction.
Condition Code Qpemtors
15
5 4 3 2 1 0
Condition code bits corresponding to bits in the condition code operator
(bits 3-O; N, Z, V, C) are modified according to the sense of bit 4, the set/
clear bit of the operator. The following mnemonics are permanent symbols
in the assembler:
Mnemonic Operation Op Code Mnemonic Qperetion Op Code
CLC Clear C 000241 SEC Set C 000261
CLV Clear V 000242 SEV Set V 000262
K
Clear Z oo(2244 SEZ Set Z 000264
Clear N 000250 SEN Set N
000270
Timing for all condition code operators is the basic instruction time (1.5~s)
for the operators. (The codes 000240 and 000260 are the shortest “no+opera-
tion” instructions.)
T
Shift and rotate operations r,equire an additional 0.6 we to etceee bytes at odd
addresses.
40