Specifications

- Arithmetic Shift Right
ASR dst
2.3 us
dst
01 , 0, 1 , 6, 1 , 2 , I t I e I
15 6 5 0
Condition Codes:
Z: set if the result = 0; cleared otherwise
N: set if the high-order bit of the result is set; cleared
otherwise
C: loaded from the low-order bit of the destination
V: loaded from the Exclusive OR of the N-bit and C-bit
.(as set by the completion,of the shift operation)
.
Description: Shifts all bits of the destination right one ‘place. Bit 15 is rePli-
cated. The C-bit is loaded from bit 0 of the destination. ASR performs signed
division of fhe destination by 2.
Arithmetic Shift Left
ASL dst
2.31~
01 , , 1 , , 1 , 0 6 3,
dst
1 I I I I
(5
6 5
0
Condition Codes: Z: set if the result = 0; cleared otherwise
N: set if the high-order bit of the result is set; cleared
otherwise
C: loaded with the high-order bit of the destination
V: loaded with the Exclusive OR of the N-bit and C-bit
(as set by the completion of the shift operation)
Description: Shifts all bits of the destination left one place. Bit 0 is loaded
with a 0. The C-bit of the status word is loaded from the most significant bit
of the destination. ASL performs a signed multiplication of the destination
by 2.
Multiple precision shifting is done with a sequence of shifts and rotates.
Double Precision Right Shift:
ASR Al; low-order bit of Al to C-bit
ROR AO; C-bit to high-order bit of.AO
Double Precision Left Shift:
ASL AO;. high-order bit of A0 to C-bit
ROL Al; C-bit to low-order bit of Al
Normalization of operands (scaling of the operand until the operand taken
as a 15-bit fraction with sign is in the range - l/e < operand < l/e) pro-
ceeds as follows:
NORM: ASL A
BEQ
NFIN
BVC NORM ’
ROR A
BR NDONE
NFtNy.3 i ’
ROR ‘A ”
: 1 “‘ 1 ?
,ASR A,
NDONE: . . .
; shift O’s into low-order bit
; if the result is 0, the operation is
; complete
; if the sign did not change, continue
;restore the sign
; normalization complete
: &store the sign: 000000 or 100000
f atiiYmplicate R?OOOOOO or 140000
\