Specifications

(decrement by two) address and-uses the new contents of the general reg-
ister as the operand address. Instructions of the form
-0PR
-(RI
specify autodecrement addressing. The address field for autodecrement ad- ’
dressing is
This mode also may be deferred and specified by instructions of the form
OPR @ -(R). When deferred the address field is
STACK PROCESSING
The combination of autoincrement addressing in which the general register is
stepped forward after the operand address is determined and autodecrement
addressing in which the general register is stepped backward before the
operand address is determined is the basic requirement for convenient low
overhead stack operations.
The PDP-11 has extensive stack processing capabilities. The stack pointer
(SP), R6, maintains a stack for the nested handling of interrupts. All of the
general registers can maintain stacks under program control. Elements in
the middle of stacks may be accessed through indexed addressing. This
provides for convenient access of dynamically assigned temporary storage,
especially useful in nested procedures.
USE OF THE PC AS A GENERAL REGISTER
There are special implications in the use of the addressing modes already
described when applied to the PC (R7). The use of the PC with the address-
ing modes described above generates immediate, absolute, relative, and
deferred relative addressing.
IMMEDIATE ADDRESSING-Immediate addressing provides time and space
improvement for access of constant operands by including the constant in .
the instruction. The instruction word referencing an immediate operand
specifies autoincrement addressing through the program counter. The ad-
dress field would be
The program counter points to the word after the instruction word. The con-
tents of this word are therefore used as the operand and the program counter
.
is stepped to the next word. PAL-11 recognizes address expressions of the
form “#n” as immediate operands and codes them with the address field
shown above followed by a word of data (n).
A full word is assembled for immediate operands even in byte instructions
so that instruction words are always fetched from even locations.
ABSOLUTE ADDRESSING-The contents of the location following the instruc
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