Specifications

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CHAPTER i
SYSTEM INTRODUCTION
SYSTEM DEFINITION
Digital Equipment Corporation’s PDP-11 is a 16.bit, general-purpose, parallel-
logic computer using two’s complement arithmetic. The PDP-11 is a variable ’
word length processor which .directly addresses 32,768 16.bit words or
65,536 8-bit bytes. All communication between system components is done
on a single- high-speed bus called a Unibus. Standard features of the system
include eight general-purpose registers which can be used as accumulators.
index registers, or address pointers, and a multi’level automatic priority in-
terrupt system.
SYSTEM COMPONENTS
UNIBW-There are five concepts that are very important for understanding
both the hardware and software implications of the Unibus.
Single Bus--The Unibus is a single, common path that connects the central
processor memory, and all peripherals. Addresses, data, and control informa-
tion are sent along the 56 lines of the bus.
The form of communication is the same for every device on the Unibus. The
processor uses the same set of signals to communicate with memory as with
peripheral devices. Peripheral devices also use this set of signals when com-
municating with the processor, memory, or other peripheral devices.
Peripheral device registers may be manipulated as flexibly as core memory
by the central processor. All the instructions that can be applied to data in
core memory can be applied equally well to data in peripheral device regis-,
.ters. This is an especially powerful feature, considering the special capability
of PDP-11 instructions to process data in any memory location as though it
were an accumulator.
Bidirectiona) Lines--Unibus lines are bidirectional, so that the same signals
which are received as input can be driven as output. This means that a
peripheral device register can be either read or set by the central processor
or other peripheral devices; thus, the same register can be used. for both
input and output functions.
Master-Slave Relation-Communication between two devices on the bus is
in the form of a master-slave relationship. At any point in time, there is one
device that has control of the bus. This controlling device is termed the
“bus master.” The master device controls the bus when communicating with
another device on the bus, termed the “slave.” A typical example of this
relationship is the processor, as master, fetching an instruction from mem-
ory (which is always a slave). Another example is the disk, as master, trans-
ferring data to memory, as slave.
interlocked Communication--Communication on tliq Unibus is interlocked
so that for each control signal issued by the master device, there must be-a
response from the slave in order to complete the transfer. Therefore, com-
munication is independent of the physical bus length and the response time
of the master and slave devices. The maximum transfer rate on the Unibus
is one 16-bit word every 750 nanoseconds, or 1.3 million 16-bit words- per
second.