Specifications
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NOTES:
1. Step 1 of the next-data transfer-may begin at step 5 of the current DATO or
DATOB.
2. Step .2 of the next data transfer may begin at step 7 of the current DATO or
DATOB.
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PTR-PRIORITY TRANSFER
This bus operation is used to pass control of the bus from one master to
another. The steps which fbllow are performed simultaneously with the data
transfers:
0.
1.
2.
3.
4.
5.
6.
7.
.
8.
9.
Current master device always has BBSY asserted.
Requesting device asserts its assigned BR line.
Processor sees BR asserted, determines which BR is highest, and
asserts the corresponding BG line if the processor’s Current Prior@
level’allow that level of bus request.
Each device that receives the BG passes it on to the next device
unless it itself is requesting.
.
The BG is propagated a!ong the priority chain until it reaches the
first .requesting device. This device becomes selected as next bus
master and does not allow the BG to pass to succeeding devices.
The selected device asserts SACK and drops its BR, .and waits for
BBSY,,BG, and SSYN to drop. .
The processor sees SACK and drops BG.
The device which is current master completes its data transfers,
drops BBSY, and ceases to be bus master. .
The selected device sees BG, BBSY, and SSYN drop, becomes bus
master, asserts BBSY, drops SACK, and begins data transfers.
New master relinquishes bus control, either to the processor or to a
requesting device, by dropping BBSY at the end of its last bus op
eration. This is termed a passive release of bus control.
NOTES:
1. NPR bus requests ore handled as above.
2. Processor defers action on BR <7:4> until last bus cycle of an instruction
execution or interrupt sequence, NPR is acted upon immediately.
. 3.
Processor becomes bus master and asserts BBSY whenever it sees BBSY = 0
end no other’ device has been selected or is being selected as next bus master.
4.
Processor will not execute step 2 if SACK is asserted. See note 2 under INTR.
Figure D-3 shows the signals for a PTR operation.
PTR
SIGNALS AT DEVICE
BR
JT .
I
BG
II3
I
I
SACK
IT
SIGNALS AT PROCESSOR
BR
JR
I
‘0G
SACK
IR
T= SIGNAL AS TRANSMITTED
R * SIGNAL AS RECEIVED
Figure D-3 PTR Operation
101
.