Specifications

Performance
Input bias current
Input protection
Common mode rejection
ratio
AID output
Data buffer register
Resolution
Data notation
Sample and hold amplifier
Aperture uncertainty
Aperture delay
Front end settling
Input noise
AID
converter performance
Linearity
Stability (temperature coefficient)
Stability (long term)
System accuracy (gain=l)
System throughput
Configuration Information
Form factor
Power requirements
Power consumption
Bus loads
±20 nA at 25°C maximum
Inputs are current-limited and protected to an
overvoltage of ±35 V without damage.
80 dB at a range of ±10 V at 60 Hz
16-bit read-only
output register
12 bits unipolar; 11 bits bipolar plus sign
Binary, offset binary, or 2's complement
Less
than 10 nanoseconds
Less
than 0.5 J.lS from start of conversion to signal
disconnect
Less
than 15 J.lS to ±0.01 % of full-scale value for a
p-p input of 20 V
Less than 0.2 m V rms
Less than ±1/2 LSB
±30
ppm at maximum C/o
±0.05% change in 6 months
Input voltage to digitized value to within ±0.03%
25K channel samples/second
Dual height
+5 Vdc, 3.2 A (typical)
+12 Vdc,
0.0 A
16.0W
1.3 ac
1.0 dc
Option Specifications 2-55