Specifications

2–17
Principles of Operation
CCB Hardware Summary
A Motorola 68010 microprocessor performs the DPU functions, a 64180
microprocessor handles the RTPU functions, and an 8032 microcontroller
serves as the paper feed controller (PFC), which is part of the RTPU. Actual
implementation of this hardware blurs the distinctions between the DPU and
RTPU, since the 68010 has access to the parallel port and the real–time
functions of the dot plucker, which are RTPU resources, while the 64180 has
access to the nonvolatile memory (NVRAM), which is a resource of the
DPU. These possibilities exist because of efficiencies in the hardware design;
software maintains the functional differences between the DPU and RTPU.
The CCB has four data buses:
♦ The 68010 has a local sixteen bit bus.
♦ The 64180 uses a local bus eight bits wide.
♦ The DPU and RTPU share a sixteen bit bus arbitrated on a
cycle–by–cycle basis.
♦ The 8032 chip has its own eight bit local bus.
The manner in which the CCB implements this hardware is depicted in
Figure 2–13.
The 64180 IC that oversees the RTPU processor contains a Z80
microprocessor with extended memory management, two DMA controllers,
two asynchronous and one synchronous serial port, two counter timers, and
an interrupt controller.