Technical data

Troubleshooting
3–6
Digital HiNote VP 500 Service Guide
Check Points and Error Messages
At the beginning of each POST routine, the BIOS outputs the test point error code to I/O
address 80h. Use this code during troubleshooting to establish at what point the system failed
and what routine was being performed.
If the BIOS detects a terminal error condition, it halts POST after:
• Issuing a terminal error beep code and
• Attempting to display the error code on upper left corner of the screen and on the port
80h LED display
If the system hangs before the BIOS can process the error, the code displayed at port 80h is
that of the last test performed. In this case, the screen does not display the error code.
Phoenix BIOS Test Points
The following is a list of the checkpoint codes written at the start of each test and the beep
codes issued for terminal errors:
Code
Beeps
POST Routine Description
02
Verify Real Mode
04
Get CPU type
06
Initialize system hardware
08
Initialize chipset registers with initial POST values
09
Set in POST flag
0A
Initialize CPU registers
0C
Initialize cache to initial POST values
0E
Initialize I/O
0F
Initialize the local bus IDE
10
Initialize Power Management
11
Load alternate registers with initial POST values
12
Jump to UserPatch0
14
Initialize keyboard controller
16 2
-2-3
BIOS ROM checksum
18
8254 timer initialization
1A
8237 DMA controller initialization
1C
Reset Programmable Interrupt Controller
20 3
-1-1
Test DRAM refresh
22 3
-1-3
Test 8742 Keyboard Controller
24
Set ES segment register to 4 GB
28
Autosize DRAM
2A
Clear 512K base RAM
2C 3
-4-1
Test 512K base address lines
2E 3
-4-3
Test 512K base memory
30
Base 64K RAM Error
32
Test CPU bus-clock frequency
34
Test CMOS RAM
35
Initialize alternate chipset registers
37
Reinitialize the chipset
38
Shadow system BIOS ROM