Technical data
Schematics
Digital HiNote VP 500 Service Guide
D–13
12
12
B_D[0..15]
B_A[0..25]
B_D[0..15]
B_A[0..25]
12B_CE1\
B_D3
B_D4
B_D5
B_D6
B_D7
B_A10
B_CE1\
P1
P2
P3
P4
P5
P6
P7
P8
P9
P10
P11
P12
P13
P14
P15
P16
P17
P18
P19
P20
P21
P22
P23
P24
P25
P26
P27
P28
P29
P30
P31
P32
P33
P34
P35
P36
P37
P38
P39
P40
P41
P42
P43
P44
P45
P46
P47
P48
P49
P50
P51
P52
P53
P54
P55
P56
P57
P58
P59
P60
P61
P62
P63
P64
P65
P66
P67
P68
JP11
SLOT B
B_D11
B_D12
B_D13
B_D14
B_D15
B_CD1\
B_CE2\
12
12
B_CD1\
B_CE2\
A_D[0..15]
A_A[0..25]
A_A[0..25]
A_D[0..15]
12
12
A_CE1\
A_D3
A_D4
A_D5
A_D6
A_D7
A_A10
A_CE1\
P1
P2
P3
P4
P5
P6
P7
P8
P9
P10
P11
P12
P13
P14
P15
P16
P17
P18
P19
P20
P21
P22
P23
P24
P25
P26
P27
P28
P29
P30
P31
P32
P33
P34
P35
P36
P37
P38
P39
P40
P41
P42
P43
P44
P45
P46
P47
P48
P49
P50
P51
P52
P53
P54
P55
P56
P57
P58
P59
P60
P61
P62
P63
P64
P65
P66
P67
P68
JP10
SLOT A
A_D11
A_D12
A_D13
A_D14
A_D15
A_CE2\
A_CD1\
A_CD1\
A_CE2\
12
A_IOWR\
A_IORD\
A_VS1
A_VPP
12
12
12
13
12
A_SLOT_VCC
A_VPP
A_A17
A_A18
A_A19
A_A20
A_A21
A_A22
A_A23
A_A24
A_A25
A_IORD\
A_IOWR\
A_OE\
A_SLOT_VCC
A_VPP
A_RDY/IRQ\
A_WE\
A_A11
A_A9
A_A8
A_A13
A_A14
A_A16
A_A15
A_A12
A_A7
A_OE\
A_WE\
B_IORD\
B_VS1
B_IOWR\
B_VPP
12
12
12
12
12
13
12
B_SLOT_VCC
B_VPP
B_A17
B_A18
B_A19
B_A20
B_A21
B_A22
B_A23
B_A24
B_A25
B_IORD\
B_IOWR\
B_OE\
B_SLOT_VCC
B_VPP
B_A11
B_A9
B_A8
B_A13
B_A14
B_A16
B_A15
B_A12
B_A7
B_OE\
B_RDY/IRQ\
B_WE\
12
B_WE\
B_RDY/IRQ\
12
12
12
B_WP/IO16\
B_A6
B_A5
B_A4
B_A3
B_A2
B_A1
B_A0
B_D0
B_D1
B_D2
B_WP
B_D8
B_D9
B_D10
B_CD2\
B_BVD2
B_BVD1
B_RESET
B_WAIT\
B_INPACK\
B_REG\
B_RESET
B_WAIT\
B_INPACK\
B_REG\
B_CD2\
B_VS2
B_BVD1/STS\
B_VD2/SPKR
12
12
12
12
12
12
12
12
12
A_WP/IO16\
A_A6
A_A5
A_A4
A_A3
A_A2
A_A1
A_A0
A_D0
A_D1
A_D2
A_WP
A_D8
A_D9
A_D10
A_RESET
A_WAIT#
A_INPACK\
A_REG\
A_BVD2
A_BVD1
A_CD2\
A_RESET
A_WAIT#
A_CD2\
A_INPACK\
A_REG\
A_VS2
A_BVD1/STS\
A_VD2/SPKR
12
12
20
12
12
12
12
20
A_RDY/IRQ\
A_RDY/IRQ\
A_VPP B_VPP
12
A_CD1\
+5V
2
3
1
1
4
U55A
74HCT02
C408
.1UF
+5V
+5V
PCMLED#
12,19
+5VS
8
9
10
1
4
U55C
74HCT02
*
A_CE1\
B_CD1\
B_CE1\
+5V
5
6
4
1
4
U55B
74HCT02
*
C52
.1UF
C50
.01UF
C302
4.7UF
C301
.1UF
+3V
C294
10UF_A
6.3V
C296
4.7UF
C297
.1UF
+5V
C49
.1UF
C48
.01UF
C289
4.7UF
+12V
C295
4.7UF
C51
.1UF
+5V +12V +3V
PCIRST#
PCLK_PCM
ISDA12
4,14,20,22
9,12
*
C76
.1UF
SIN#
1
PCI_CLK
5
RST#
15
SOUT#
3
V
C
C
2
8
IRQ4
26
IRQ3
27
SDATA
18
SCLK
19
SLATCH
16
VCC_ACT
2
VPP_ACT
4
IRQ5
25
IRQ7
24
IRQ11
23
IRQ12
22
IRQ14
21
IRQ15
20
A_VCC_5
8
A_VCC_3
9
B_VCC_5
12
B_VCC_3
13
B_VPP_PGM
10
B_VPP_VCC
11
A_VPP_PGM
6
A_VPP_VCC
7
N
C
1
7
G
N
D
1
4
U33
IPCC
28C20
IRQ3
IRQ4
IRQ5
IRQ7
IRQ11
IRQ12
+5VS
14,18,22
14,20,22
14,16,22
14,22
14,16,22
14,16,22
14,16,21,22
14,15,16,21,22IRQ14
IRQ15
ISLD
+5VS
2 4
3
5
U54
TC7S04F
12
12
12
A_SLOT_VCC
B_SLOT_VCC
13
13A_VPP
B_VPP
A_VPP
B_VPP
A_SLOT_VCC
B_SLOT_VCC
V
D
D
2
5
5
V
1
5
V
2
5
V
3
0
1
2
V
7
1
2
V
2
4
3
V
1
5
3
V
1
6
3
V
1
7
DATA
3
CLOCK
4
LATCH
5
APWR_GOOD#
13
BPWR_GOOD#
19
OC#
18
AVPP
8
AVCC
9
AVCC
10
AVCC
11
BVPP
23
BVCC
22
BVCC
21
BVCC
20G
N
D
1
2
N
C
6
N
C
1
4
N
C
2
6
N
C
2
7
N
C
2
8
N
C
2
9
U28
TPS2202
C47
100PF
VGARTC
SER_DATA
SER_LATCH
*
R38
0
C299
.1UF
C298
4.7UF
C46
.1UF
C226
4.7UF
8 7 6 5 4 3 2 1
A
B
C
D
12345678
D
C
B
A
Date: July 22, 1996 Sheet 13 of 23
Size Document Number REV
B Schematics, TS31G1 1.0
Title
PCMCIA Socket and Power control
Compal Electronics, Inc.