Technical data
Schematics
D–12
Digital HiNote VP 500 Service Guide
FRAM E#
TRDY#
STOP#
DEVSEL#
IRDY #
C/BE0#
C/BE1#
C/BE2#
C/BE3#
REQ#0
GNT#0
POK
PLOCK#
4,9,10,19,23
4,10,14,20,22
4,10,14,20,22
4,10,14,20,22
4,14,22
4,10,14,20,22
4,10,14,20,22
4,10,14,20,22
4,22
4,10,14,20,22
4,22
4,10,14,20,22
R21
0
R13
0
R18
0
R185
10
*
*
*
CLKRUN#
PCM_RI#
PCLK_PCM
IRQ10
IRQ9
ISDA
ISLD
R30
0
R29
0
*
R14
0
17
14,22
13
13
+5V
R37
0
R35
0
14,16,22
9,13
4,10,14,22
+3V
*
B_A[0..25]
C41
.01UF
C44
.1UF
13
B_A0
B_A1
B_A2
B_A[0..25]
C45
.1UF
P
C
I
C
L
K
1
G
N
T
#
2
A
D
3
1
4
P
C
I
V
C
C
6
A
D
2
8
8
A
D
2
7
9
A
D
2
6
1
0
A
D
2
5
1
1
A
D
2
4
1
2
C
/
B
E
3
#
1
3
R
I
N
G
G
N
D
1
4
I
D
S
E
L
1
5
A
D
2
3
1
6
A
D
2
2
1
7
A
D
2
1
1
8
A
D
2
0
1
9
A
D
1
9
2
0
P
C
I
V
C
C
2
1
A
D
1
8
2
2
A
D
1
6
2
4
C
/
B
E
2
#
2
5
R
I
N
G
G
N
D
2
8
I
R
D
Y
#
2
9
T
R
D
Y
#
3
0
S
T
O
P
#
3
2
A
D
3
5
3
P
A
R
3
5
C
/
B
E
1
#
3
6
P
C
I
V
C
C
3
7
A
D
1
4
3
9
A
D
1
3
4
0
A
D
1
2
4
1
A
D
1
1
4
2
A
D
1
0
4
3
R
I
N
G
G
N
D
4
4
A
D
9
4
5
A
D
8
4
6
C
/
B
E
0
#
4
7
A
D
7
4
8
A
D
6
4
9
A
D
5
5
1
A
D
3
0
5
A
D
4
5
2
C
O
R
E
G
N
D
2
6
A
D
2
5
4
A
D
1
5
5
A
D
0
5
6
A_D6
66
A -REG
112
A_D3
59
A -CD1
61
A_D4
62
A_D11
63
A_D5
64
A_D12
65
A_D13
67
A_D7
68
A_D14
69
A -CE1
70
A_D15
71
A_A10
73
A_SO CKET_VCC
117
A -CE2
74
A_A11
77
A -IORD
78
A_A9
80
A -IOWR
81
A_A8
82
A_A17
83
A_A13
84
A_A18
85
R
I
N
G
G
N
D
7
2
A_A19
88
A -WE
89
A_A21
92
A_A16
93
A_A22
94
A_A15
95
A_A23
96
A_A12
97
A_SO CKET_VCC
98
A_A24
99
A_A7
100
A_A25
102
A_A6
103
A_A20
90
A RDY/ -IRQ
91
A RESET
106
A VS 2/GPSTB2
104
A_A5
105
A_A4
107
A -WAIT
108
A -INPACK
110
A
D
2
9
7
A_A2
111
A_A1
113
A BV D2/-SPKR
114
A_A0
116
A_D0
119
A_D8
120
A_D1
121
A_D9
122
A_D2
123
A_D10
124
A WP /-IOIS16
125
A_A3
109
A -CD2
126
+
5
V
1
2
7
R
I
N
G
G
N
D
8
7
B_D3
135
B -CD1
136
B_D4
137
B -REG
188
B_D11
138
B_D5
139
B_D12
140
B_D6
141
B_D13
142
B_D7
144
B_D14
145
B -CE1
147
B_D15
148
B_A10
149
C
O
R
E
V
D
D
1
3
4
B -CE2
150
B -OE
151
B_A11
153
B -IORD
154
B_A9
155
B -IOWR
156
B_SOCKET_VCC
160
B_A8
157
B_A17
158
B_A13
159
B_A18
161
B_A14
162
B_A19
164
B -WE
165
B_A20
166
B RDY/-IRQ
167
B_A21
168
B_A16
169
B_A22
170
B_A15
171
B_A23
172
B_A12
173
R
I
N
G
G
N
D
1
0
1
B_A24
174
B_A7
175
B_A25
176
B_A6
178
B VS1/GPSTB1
152
B_A5
181
B RESET
182
B_A4
183
B -WAIT
184
B_A3
185
B_SOCKET_VCC
143
B BVD2/-SPKR
190
B -INPACK
186
B_A2
187
B_A1
189
B_A0
191
B BVD1/-STSCHG
192
B_D8
195
B_D1
196
B_D9
197
B_D2
198
B_D10
199
B_D0
194
B WP/-IOIS16
201
B -CD2
202
C
L
K
R
U
N
#
2
0
8
R
S
T
#
2
0
7
A
D
1
7
2
3
F
R
A
M
E
#
2
7
A_A14
86
A -OE
75
A BVD1/-STSCHG
118
D
E
V
S
E
L
#
3
1
A
D
1
5
3
8
R
I
N
G
G
N
D
5
7
R
E
Q
#
3
P
C
I
V
C
C
5
0
A VS 1/GPSTB1
76
B VS2/GPSTB2
179
P
E
R
R
#
3
3
S
E
R
R
#
3
4
L
O
C
K
#
5
8
R
I
N
G
G
N
D
1
1
5
RING GND
129
RING GND
146
RING GND
163
RING GND
177
RING GND
193
A_SO CKET_VCC
79
A_SO CKET_VCC
60
B_SOCKET_VCC
180
B_SOCKET_VCC
200
I
N
T
A
#
/
I
R
Q
9
2
0
3
R
I
#
/
I
N
T
B
#
/
I
R
Q
1
0
2
0
4
S
O
U
T
#
/
I
N
T
C
#
/
I
S
L
2
0
5
S
I
N
#
/
I
N
T
D
#
/
I
S
D
A
2
0
6
LED_OUT*
133
S
C
L
K
1
3
2
S
D
A
T
A
/
S
M
B
D
A
T
1
3
1
S
L
A
T
C
H
/
S
M
B
C
L
K
1
3
0
SPKR_OUT*
128
U27
6730
C43
.01UF
C40
1000PF
C314
15PF
PERR#
SERR#
AD15
R15
330
4,10,14,20,22
14,20,22
10,14,22
4,10,14,20,22
PAR
A_A[0..25]
A_A0
A_A1
A_A2
A_A[0..25]
13
+5V
A_VS1
1 8
2 7
3 6
4 5
RP8
8P4R-100K
A_A3
A_A4
A_A5
A_A6
A_A7
A_A8
A_A9
A_A10
A_A11
A_A12
A_A13
A_A14
A_A15
A_A16
A_A17
A_VS1
A_VS2_C
12,13
INTA# --> PIRQA#
INTC#,INTD# --> PIRQ B#
B_A3
B_A4
B_A5
B_A6
B_A7
B_A8
B_A9
B_A10
B_A11
B_A12
B_A13
B_A14
B_A15
B_A16
B_A17
B_D[0..15]
13
B_A18
B_A19
B_A20
B_A21
B_A22
B_A23
B_A24
B_A25
B_D0
B_D1
B_D2
B_D[0..15]
A_A18
A_A19
A_A20
A_A21
A_A22
A_A23
A_A24
A_A25
A_D0
A_D1
A_D2
A_D[0..15]
A_CD1\
A_CD2\
12,13
12,20
12,13
A_D[0..15]
A_CD1\
A_CD2\
13
A_RESET
A_D3
A_D4
A_D5
A_D6
A_D7
A_D8
A_D9
A_D10
A_D11
A_D12
A_D13
A_D14
A_D15
CL-PD6730
B_RESET
B_D3
B_D4
B_D5
B_D6
B_D7
B_D8
B_D9
B_D10
B_D11
B_D12
B_D13
B_D14
B_D15
12,13
12,13
12,13
12,13
+5V
B_VS1
B_VS2
B_CD1\
B_CD2\
1 8
2 7
3 6
4 5
RP10
8P4R-100K
B_VS1
B_VS2
B_CD1\
B_CD2\
B_INPACK\
B_BVD1/STS\
B_WP/IO16\
B_VD2/SPKR13
13
13
13
12,13
12,13
12,13
13
13
13
12,13
13
13
13
13
B_CE1\
B_OE\
B_CD 1\
B_IORD\
B_IO WR\
B_WA IT\
B_CD 2\
B_WE\
B_VS1
B_VS2
A_IOWR\
A_WAIT#
A_CE1\
A_OE\
A_CD2\
A_IORD\
A_INPACK\
A_VD2/SPKR_C
A_WE\
A_VS1
A_BVD1/STS\
A_WP/IO16\
A_CD1\
A_VS2_C
13
13
13
13
13
13
20
13
12,13
13
12,20
12,13
13
13
12,13
A_CE2\
A_REG\
A_SLOT_VCC
A_RDY/IRQ\
C26
.1UF
13
13
13
13
*
B_CE2\
B_REG\
PCMSPK#
+5V
*
*
20
R36
10K
R32
10K
B_SLOT_VCC
B_RDY/IRQ\
PCMLED#
C42
.1UF
13
13
13
13
13,19
AD[0..31]
4,10,14,20,22
AD[0..31]
A
D
0
A
D
2
A
D
3
A
D
4
A
D
5
A
D
6
A
D
7
A
D
8
A
D
1
A
D
9
A
D
1
0
A
D
1
1
A
D
1
2
A
D
1
3
A
D
1
4
A
D
1
5
A
D
1
6
A
D
1
7
A
D
1
8
A
D
1
9
A
D
2
0
A
D
2
1
A
D
2
2
A
D
2
3
A
D
2
4
A
D
2
5
A
D
2
6
A
D
2
7
A
D
2
8
A
D
2
9
A
D
3
0
A
D
3
1
SER_LATCH
SER_DATA
+5V
R33
10K
R34
10K
*
*
SER_LATCH
SER_DATA
VGARTC
R16
0
9,10,13
13
13
8 7 6 5 4 3 2 1
A
B
C
D
12345678
D
C
B
A
Date: July 22, 1996 Sheet 12 of 23
Size Document Number REV
B Schematics, TS31G1 1.0
Title
Cirrus CL-6730 PCI PCMCIA controller
Compal Electronics, Inc.