Technical data

Schematics
Digital HiNote VP 500 Service Guide
D–9
20
10
14MOSC 14.3M_AUD 14M_VGA
+5VS
5 6
1 4
U38C
74ACT04
*
R199
22
R192,R193 change to L for EMI
R192
FBM-11-20
R193 FBM-11-20
+5VS
9 8
1 4
U38D 74ACT04
R59 10K
+5VOSC
X3
14.318MHZ
R58
2M
VOLTID 1
1 2
J2
JOPEN
VOLTID 22
2,14 8MHZ
7
14.318MHZ
11
24MHZ
6
SCLK20
1
SCLK21
16
SCLK22
10
X1/ICLK
3
X2
2
SLOWCPU
15
2XCPUCLK
14
OE
9
VCC
4
VCC
13
GND
12
GND
5
AGND
8
U35 W48C54A-23 SOP
C83
.1UF
C78 .1UF
C84 1000PF
R186
22
R187
22
C82
.01UF
C79 4.7UF_A 10V
L9
BLM21A10
+5VOSC
+5VS
C77
33PF
C317
100PF
**
24MOSC HCLK
C94 33PF
C93 33PF
C322
33PF
***
SCLK20 SCLK21 SCLK22 2XCPUCLK(MHZ)
0 1 1 66 0 0 1 60
14
14 16
1 1 1 50
+3VS
L11
BLM21A10
C92
.01UF
C318 10UF_A 6.3V
C91
1000PF
C89 10PF
R60
10K
C90
.1UF
L10
BLM21A10
C85 10PF
C80 10PF
+5V
1 2
1 4
U9A 4069
X4
32.768KHZ
C339 .1UF
3 4
1 4
U9B 4069
5 6
1 4
U9C 4069
C340
15PF
+5V
VGARTC
10,12,13
14
HCLKCO
R195
10
C319
15PF
X1
16
X2
1
Q0
4
Q1
6
Q2
8
Q3
10
Q4
12
Q5
14
EN1
15
EN2
2
V D D
5
V D D
9
V D D
1 3
G N D
3
G N D
7
G N D
1 1
U36 W40C06
R188
22
R189
22
R190
22
R194
22
C95 33PF
C86
33PF
C87 33PF
* * *
HCLK_MTSC HCLK_CPU HCLK_SRAM0 HCLK_MTDP
C88 33PF
3
*
5
6
4
+5VS
L7
BLM21A10
C291
.01UF
C290 4.7UF_A 10V
C292
1000PF
C293
10PF
R63
10K
C100
.1UF
14
PO K#
SQW
12 11
1 3
1 4
U17D 74HCT125
+5V51
R215
1M
9
R214
157.5K
C341
285PF
PCICLKO14
C409
22PF
R196
10
C325
15PF
X1
16
X2
1
Q0
4
Q1
6
Q2
8
Q3
10
Q4
12
Q5
14
EN1
15
EN2
2
V D D
5
V D D
9
V D D
1 3
G N D
3
G N D
7
G N D
1 1
U37 W40C06
R191
22
R62
22
R171
22
R197
22
R198
22
R64
22
C99 33PF
C324
33PF
C323
33PF
***
PCLK_PCM PCLK_MTSC PCLK_MPIIX PCLK_VGA PCLK_DOCK PCLK_MPEG
C288
33PF
C97
33PF
C287
33PF
***
10
14
12,13
22 20 4
4,14
R69
0
RTCCLK
9 8
1 0
1 4
U16C 74HCT125
+5V51
9 8
1 4
U9D
4069
R225 15.75K
11 10
1 4
U9E 4069
13 12
1 4
U9F
4069
+5V
4,10,12,19,23
PO K
13 12
1 4
U12F 74HCT04
POK#
9
8 7 6 5 4 3 2 1
A B C D
12345678
D C B A
Da te: July 19, 1996 Sheet 9 of 23 Si ze Document Number REV
B Schematics, TS31G1 1.0
Ti tle
Clock Generator and Buffers
Compal Electronics, Inc.