Technical data

Overview
1–2
DIGITAL HiNote Ultra 2000 Service Guide
Chip Set
The PicoPower Vesuvius chip set is used to implement the core functions of the
system.
The V1 and V2 chips provide the core system functions.
Support for all Intel Pentium processors.
Support for write-through secondary (L2) cache.
Eight level write post buffer to DRAM (2-1-1-1 writes @ 66MHz).
32/64-bit DRAM interface.
DRAM timing, bus width, and type programmable DRAM interface on a bank by
bank basis.
PCI bus arbiter.
Hot docking support for PCI/ISA docks.
Advanced Power Management features.
The V2 chip provides the PCI bus interface and the interface between the V1 and
memory.
The V3 chip provides the PCI to ISA bridge interface.
PCI-to-ISA bridge.
Full ISA bus support in positive decode and subtractive mode.
Distributed DMA protocol support.
Serialized IRQ protocol support.
Memory
The system comes with 16MB of on-board EDO DRAM for system memory and 512KB of L2
cache memory.
System memory can be upgraded to a total of 144MB. The upgrade is performed by installing
8MB, 16MB, 32MB or 64MB EDO SO-DIMMs. There are two slots for additional memory.
Memory can be upgraded one module at a time. Either slot can be populated first.
BIOS
The system has an Intel 28F002BX-T 2MB Boot block Flash ROM for system BIOS. BIOS
provides support for the following:
Suspend to RAM.
Full APM 1.2 supported.
Password protection (System and Docking options).
Auto-configured with docking options.
Windows 95 ready with PnP.
Various hot-keys for system control.