Specifications

3-14 CPU Module
Dense PCI memory space is longword addressable only. You cannot write
to individual bytes. You must do longword writes. You can do quadword
writes using the STQ instructions, if you want. To get at individual bytes,
you must use the sparse space access method.
Writes to dense PCI memory space will be merged up to 32 bytes and per-
formed in one PCI transaction to the extent that the PCI target device can
deal with writes of this size.
Noncontiguous writes to longwords within the same 32-byte block will be
merged by DECchip 21164, and the longword valid bits issued by DECchip
21164 will be used to provide the corresponding PCI byte valid bits. Note
that this merging can be avoided as necessary by use of the MB or WMB
instructions.
Reads are done in 32-byte blocks and only the longword or quadword de-
sired by DECchip 21164 is used; the rest of the data is ignored. No caching
of this extra data is done anywhere, either within DECchip 21164, the
CPU module, the I/O port, or the PCI interface.
3.5 CPU Module Errors
The CPU module detects and reacts to both TLSB specified and CPU spe-
cific errors.
3.5.1 Error Categories
CPU-detected errors fall into four categories:
• Soft errors
• Hard errors
• Faults
• Nonacknowledged CSR reads
3.5.1.1 Soft Errors
This class of errors includes recoverable errors that allow for continued op-
eration of both the TLSB and CPU module. Soft errors are reported to the
DECchip 21164 through a soft error interrupt (IPL 14 hex - IRQ0). The
interrupt causes the DECchip 21164 to vector to the SCB system
correctable machine check entry point (offset 620 hex) when the DECchip
21164’s IPL drops below 14 hex.
On the CPU module, all errors in this class are data related. When a CPU
detects a soft error, it asserts TLSB_DATA_ERROR.
Soft errors include:
• Correctable Write Data Error (CWDE)
• Correctable Read Data Error (CRDE)
3.5.1.2 Hard Errors
This class of errors includes hard failures that compromise system results
or coherency, but allow for continued CPU/TLSB operation. Hard errors