Specifications

CPU Module 3-11

Table 3-4 Decrement Queue Counter Address Assignments

For window space reads, the I/O port issues the write to the Decrement

Queue Counter as soon as it has issued the window command read packet

down the hose.

CSR writes to the Decrement Queue Counter registers cause all CPU mod-

ules to decrement the associated counter. Note that the CSR write by the

I/O port to decrement its counters is not acknowledged and no data trans-

fer takes place. No error is reported as a result of the unacknowledged

write.

3.4.4 PCI Accesses

The PCI bus is accessed through window space. Figure 3-5 shows the

physical address of a PCI device as seen by the programmer. Table 3-5

gives the description of the physical address.

Figure 3-5 PCI Programmer’s Address

I/O Port Slot Address Designation

BSB+400

BSB+440

BSB+480

BSB+4C0

BSB+500

TLWSDQR4 - Window Space DECR Queue Counter for slot 4

TLWSDQR5 - Window Space DECR Queue Counter for slot 5

TLWSDQR6 - Window Space DECR Queue Counter for slot 6

TLWSDQR7 - Window Space DECR Queue Counter for slot 7

TLWSDQR8 - Window Space DECR Queue Counter for slot 8

35 34

ADDRESS<31:0>

BXB-0783-94

HOSE

IOP_SEL

IO_SPACE

PCI_SPACE_TYP

313233