Specifications

CPU Module 3-9
3.3.2.3 Gbus Space
The Gbus is the collective term for the FEPROMs, console UARTs, watch
chip, and module registers. All Gbus registers are 1-byte wide, addressed
on 64-bytes boundaries. Figure 3-4 shows how local Gbus space registers
are assigned.
Figure 3-4 Gbus Map
NOTE: Each DECchip 21164 uses a 1-Mbyte address range from FF FFF0 0000 to
FF FFFF FFFF to access internal CSRs. These addresses are not used ex-
ternally to the DECchip 21164, so there is no address conflict between the
two DECchip 21164s.
Byte Address
FF 9000 0000

FF 93FF FFC0
FF 9400 0000

FF 97FF FFC0
FF 9800 0000

FF 9BFF FFC0
FF 9C00 0000

FF 9FFF FFC0
FF A000 0000

FF A000 03C0
FF A100 0000

FF A100 03C0
FF B000 0000

FF B000 0FC0

FF C000 0000


FF C100 0000


FF C200 0000


FF C300 0000


FF C400 0000


FF C500 0000


FF C600 0000


FF C700 0000


FF C800 0000


FPROM0: 1 MB Locations
BXB-0778-94
FPROM1: 1 MB Locations
WATCH: 64 Locations
DUART0: 16 Locations
RSVD
DUART1: 16 Locations
GBUS$WHAMI: 1 Location
GBUS$MISCR: 1 Location
GBUS$TLSBRST: 1 Location
GBUS$MISCW: 1 Location
GBUS$LEDS2: 1 Location
GBUS$LEDS1: 1 Location
GBUS$LEDS0: 1 Location
GBUS$TEST: 1 Location
GBUS$SERNUM: 1 Location
RSVD