Specifications

TLSB Bus 2-37
When a commander node issues a CSR access command but does not re-
ceive acknowledgment, it sets <NAE> in the TLBER register. Only the
commander that issues the command detects this error and sets <NAE>.
The error is not broadcast and handling is node specific. The exception to
this rule is a CSR write to a Mailbox Pointer Register; no acknowledgment
is not regarded as an error and handling is node specific.
When a commander node issues a memory access command but does not
receive acknowledgment, it sets <FNAE> in the TLBER register. Only the
commander that issues the command detects this error and sets <FNAE>.
This is a system fatal error and results in TLSB_FAULT being asserted six
cycles after the command.
The commander latches the address, command, and bank number in the
TLFADRn registers upon setting either <NAE> or <FNAE>. <ATDE> is
also set.
All nodes must monitor TLSB_CMD_ACK. A data bus transaction follows
every acknowledged command. A node does not expect acknowledgment to
no-op commands.
2.4.3.4 Unexpected Acknowledge
Every node monitors TLSB_CMD_ACK every cycle and sets <UACKE> if
it detects TLSB_CMD_ACK asserted when it is not expected. This error
causes TLSB_FAULT to be asserted four cycles after TLSB_CMD_ACK.
A node expects TLSB_CMD_ACK only in a valid address bus sequence.
TLSB_CMD_ACK is not expected:
• When not in a valid address bus sequence
• In response to a no-op command
2.4.3.5 Bank Lock Error
When a Read Bank Lock command is issued to a memory bank, the mem-
ory initiates a counter to timeout the bank lock condition. The counter
starts when the read data is driven onto the bus, that is, after
TLSB_SEND_DATA is issued and TLSB_HOLD is deasserted. Each clock
cycle is counted except for each two-cycle sequence where TLSB_ARB_SUP
asserts. The count is 256 cycles. If the timeout expires before a Write
Bank Unlock command is received, the bank unlocks and the node sets
<LKTO>. The error is not broadcast. It is assumed this condition is the
result of an error in the node that issued the Read Bank Lock command.
This timeout can be disabled by software. TLCNR<LKTOD> prevents
<LKTO> from setting. It will not clear <LKTO> if already set.
2.4.3.6 Bank Available Violation Error
If a memory bank receives a memory access command while the bank is
not available, the memory node sets TLBER<BAE> and asserts
TLSB_FAULT six cycles after the command. The memory node sets TL-
BER<BAE> if a new command appears on the bus while TLSB_BANK_
AVL is deasserted for the bank or during the first four cycles when
TLSB_BANK_AVL is asserted. One exception is a Write Bank Unlock
command that can be issued while TLSB_BANK_AVL is deasserted; TL-