Specifications

2-10 TLSB Bus

Figure 2-2 Address Decode

When a physical address is presented to the bank decode logic, all valid ad-

dress bits, as determined by the ADRMASK field, are compared with their

corresponding physical address bits. A match between all address bits and

their corresponding physical address bits indicates an address space hit.

All valid interleave bits, as determined by the INTMASK field, are com-

pared with their corresponding physical address bits. A match between all

INTLV bits and their corresponding physical address bits indicates an in-

terleave hit. If the compares of both address space and interleave result in

hits, and the Valid bit is set, then the bank associated with this register is

being addressed. The resulting bank hit signal is encoded into a 4-bit

TLSB bank number from the register number, or register number + 8.

For every physical memory bank, a memory bank number is set by the

console in the corresponding virtual node ID field in a node’s Virtual ID

ated for which no virtual memory ID exists, the operation will never com-

plete.

NOTE: If two TLMMRn registers generate a bank hit while decoding an address,

the resulting bank number is Unpredictable. This is the result of improp-

erly initialized registers and is considered a software error. Unexpected or

inconsistent behavior may result.

Physical Address ADRMASK ADDRESS

Decode and Mask

Compare

PHAdr INTMASK INTLV

Mask

Valid

Address Hit

Interleave Hit

AND

Bank Hit

Decode and Mask

Mask

Compare

BXB0830.AI

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861

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