Specifications

System Registers 7-105
Table 7-51 STDERE Register Bit Definitions
Name Bit(s) Type Function
RSVD
<31:19> R0 Reserved. Read as zero.
VRC
<18:16> R, X Valid Residue Check. This 3-bit read-only
field is loaded at the beginning of the third pass
in self-test and specifies which one of eight val-
ues will be used by the self-test data-checking
logic to determine that the self-test data linear
feedback shift register logic is working correctly.
This field is useful in diagnosing improper opera-
tion of self-test that may be due to a faulty mod-
ule or ASIC. The value read from this register is
based upon the DRAM type and the number of
strings on a given module. This field is Unde-
fined in moving inversion self-test mode. It is
also Undefined when the SRAM option is se-
lected in the Memory Configuration Register.
VRC
(Hex)
DRAM
Type
No. of
Strings
Module
Capacity
(Mbyte)
0
1
2
3
4
5
6
7
4 Mbit
4 Mbit
4 Mbit
4 Mbit
16 Mbit
16 Mbit
16 Mbit
16 Mbit
1
2
4
8
1
2
4
8
64 (N/A)
128
256
512
256
512
1024
2048
STDERE
<15:0> R, 0 Self-Test Data Error Register_E. One or
more bits set indicate a self-test data ECC check
bit error. The contents of this register can be
used to isolate self-test failures to a single failing
bit.