Specifications

7-104 System Registers
Table 7-50 STDER A, B, C, D Register Bit Definitions
Table 7-51 describes each field of self-test data error register E. This regis-
ter is used to store failing self-test ECC check bits <15:0> in MDI0,
<31:16> in MDI1, <47:32> in MDI2, and <63:48> in MDI3.
Name Bit(s) Type Function
STDERA
<31:0> R/W, 0 Self-Test Data Error Register_A. One or
more bits set indicate a self-test data bit error.
The contents of this register can be used to iso-
late self-test failures to a single failing bit. This
register can be read or written as an aid in de-
termining proper CSR operation.
STDERB
<31:0> R, 0 Self-Test Data Error Register_B. One or
more bits set indicate a self-test data bit error.
The contents of this register can be used to iso-
late self-test failures to a single failing bit.
STDERC
<31:0> R, 0 Self-Test Data Error Register_C. One or
more bits set indicate a self-test data bit error.
The contents of this register can be used to iso-
late self-test failures to a single failing bit.
STDERD
<31:0> R, 0 Self-Test Data Error Register_D. One or
more bits set indicate a self-test data bit error.
The contents of this register can be used to iso-
late self-test failures to a single failing bit.