Specifications

7-102 System Registers

MDRB—Memory Diagnostic Register B

Table 7-49 MDRB Register Bit Definitions

ddress

ccess

BB + 0000 19C0

R/W

Memory Diagnostic Register B contains a 32-bit 64-byte aligned ad

dress value that is directly compared to TLSB_ADR<37:6>, or an

address generated by the self-test address generator. The value

loaded into this register is used in conjunction with MDRA and

DDR0:3 to cause a specific data bit and/or check bit to be flipped

whenever a TLSB memory write address matches the value con-

tained in this register.

NOTE: Since the TLSB addresses are 64-byte aligned, only TLSB_ADR-

<37:6> need be compared with this register. TLSB_ADR<4:0> is not used

and TLSB_ADR<5> is the WRAP bit, which is ignored in the comparison.

31 0

BXB-0753-93

MADR

Name Bit(s) Type Function

MADR

<31:0> R/W Match Address. The register may be loaded

with an address value that is used in diagnostic

modes to cause correctable and uncorrectable

ECC errors to be written to memory at the 64-

byte aligned address contained in this field.