Specifications

7-88 System Registers
Table 7-42 MIR Register Bit Definitions
Name Bit(s) Type Function
VALID
<31> R/W, 0 Valid. When set, enables the module to re-
spond to TLSB memory space transactions.
RSVD
<30:3> R0 Reserved. Read as zero.
INTLV
<2:0> R/W, 0 Interleave. The value of this field loaded by
console during system initialization determines
whether this module is 1,2,4,8 or 16-way inter-
leaved in the system.
INTLV
(Hex)
Banks/
Module
No of
Modules Interleave
0
0
1
1
2
2
3
3
4
5,6,7,
1
2
1
2
1
2
1
2
2
1
1
2
1
4
2
8
4
8
1-way
Reserved
2-way
2-way
4-way
4-way
8-way
8-way
16-way
Reserved