Specifications

7-66 System Registers
Table 7-31 TLINTRSUM Register Bit Definitions
Name Bit(s) Type Function
RSVD
HALT
Ctrl/P_HALT
IPL17_INTR
IPL16_INTR
IPL15_INTR
<31:29>
<28>
<27>
<26:22>
<21:17>
<16:12>
R/W, 0
R, 0
W1C, 0
R, 0
R, 0
R, 0
Reserved. Must be written as zeros.
Halt. CPU halt was written in TLCNR<HALT_x>
(this CPU) and TLINTR<HALT_ENA> is set.
Ctrl/P Halt. Ctrl/P_HALT has been received for this
CPU. Cleared with a write of 1.
IPL17 Interrupts. Indicator of outstanding inter-
rupts at IPL17. If a bit is set in this field, it indicates
that there is at least one interrupt outstanding at
IPL17 from the node number associated with the bit.
IPL16 Interrupts. Indicator of outstanding inter-
rupts at IPL16. If a bit is set in this field, it indicates
that there is at least one interrupt outstanding at
IPL17 from the node number associated with the bit.
IPL15 Interrupts. Indicator of outstanding inter-
rupts at IPL15. If a bit is set in this field, it indicates
that there is at least one interrupt outstanding at
IPL17 from the node number associated with the bit.
IPL17_INTR Bit Node Number
<26>
<25>
<24>
<23>
<22>
8
7
6
5
4
IPL16_INTR Bit Node Number
<21>
<20>
<19>
<18>
<17>
8
7
6
5
4
IPL15_INTR Bit Node Number
<16>
<15>
<14>
<13>
<12>
8
7
6
5
4