Specifications

System Registers 7-51
TLDTAGSTAT—DTag Status Register
Table 7-24 TLDTAGSTAT Register Bit Definitions
A
ddress
A
ccess
BB + 1080
R/W
Diagnostics test the DTag status RAMs by writing a value to
<DT_STAT> and reading the value back to check that the two
match. On diagnostic DTag writes, the TLDTAGSTAT register is
used to set up the <DT_STAT> value to be written. On diagnostic
DTag reads, the TLDTAGSTAT register is used to report the
<DT_STAT> value read from the DTag. This register also has a
DTag Status Parity bit. Parity is not generated on data written to
the DTag, but is checked on subsequent reads.
31 3012
RSVD
BXB-0777-93
DT_STAT_PAR
4
DT_STAT_V
DT_STAT_S
DT_STAT_D
Name Bit(s) Type Function
RSVD
DT_STAT_(V,S,D)
DT_STAT_PAR
<31:4>
<3:1>
<0>
R/W, 0
R/W, 0
R/W, 0
Reserved. Must be written as zeros.
DTag Status (Valid, Shared, Dirty). Status
read from the DTag entry associated with <DTCP>,
when <DTRD> is set at the index specified by the
DTag index of a memory read, when <FRIGN> is
set and is loaded into the appropriate bits in this
register. If <DTWR> is set, then the entry cur-
rently in this register is written to <DTAG_STAT
(V,S,D)> subject to the above qualifiers.
DTag Status Parity. Subject to all the qualifiers
above, this is the <DTAG_STAT> parity. Parity er-
rors are reported using the normal mechanism un-
less the latter is disabled. Bad parity can be writ-
ten because this data does not go through the
<DTAG_STAT> parity generator.