Specifications

7-38 System Registers
TLWSDQR4-8—Window Space Decr Queue Counter
Registers
A
ddress
A
ccess
BSB + 0400 through 0500
R/W
The TLWSDQRn registers are used by an I/O node to inform CPU
nodes when a window space address register becomes available.
One register is assigned to each I/O node by physical node ID (for
example, TLWSDQR5 to node 5). If the I/O node acknowledges the
CSR write command, it must cycle the data bus and provide data
with good ECC. The data is considered Unpredictable and is not
used by the receiver. The receiving node must decrement the
counter whether the command is acknowledged or not.
31 0
BXB-0541V-93
Unpredictable