Specifications

System Registers 7-31
TLCPUMASK—CPU Interrupt Mask Register
Table 7-13 TLCPUMASK Register Bit Definitions
A
ddress
A
ccess
BB + 0B00
R/W
The TLCPUMASK register is used to determine which CPUs are to
service interrupts. The contents of this register is combined with
the interrupt level to form the data to be written to the
TLI/OINTRn register.
The TLCPUMASK register is loaded at system initialization time
(before I/O interrupts are enabled). This register must not be
changed while I/O interrupts are enabled.
31 16 15 0
CPU_MASK
BXB-0776-93
RSVD
Name Bit(s) Type Function
RSVD
<31:16> R/W, 0 Reserved. Must be zero.
CPU_MASK
<15:0> R/W, 0 CPU Mask. When a bit is set in this field, all in-
terrupts received from the I/O system by the I/O
port are posted to interrupt the corresponding
CPU. CPUs are selected by virtual node ID.