Specifications

7-4 System Registers
7.3 TLSB Registers
Table 7-2 lists the TLSB registers. Descriptions of registers follow.
Table 7-2 TLSB Registers
Mnemonic Name Address
Modules That
Implement
TLDEV
TLBER
TLCNR
TLVID
TLMMR0
TLMMR1
TLMMR2
TLMMR3
TLMMR4
TLMMR5
TLMMR6
TLMMR7
TLFADR0
TLFADR1
TLESR0
TLESR1
TLESR2
TLESR3
TLILID0
TLILID1
TLILID2
TLILID3
TLCPUMASK
TLMBPR
TLPRIVATE
TLIPINTR
TLIOINTR4
TLIOINTR5
TLIOINTR6
TLIOINTR7
TLIOINTR8
TLWSDQR4
TLWSDQR5
TLWSDQR6
TLWSDQR7
TLWSDQR8
TLRMDQRX
TLRMDQR8
TLRDRD
TLRDRE
TLMCR
Device Register
Bus Error Register
Configuration Register
Virtual ID Register
Memory Mapping Register
Memory Mapping Register
Memory Mapping Register
Memory Mapping Register
Memory Mapping Register
Memory Mapping Register
Memory Mapping Register
Memory Mapping Register
TLSB Failing Address Register 0
TLSB Failing Address Register 1
TLSB Error Syndrome Register 0
TLSB Error Syndrome Register 1
TLSB Error Syndrome Register 2
TLSB Error Syndrome Register 3
Interrupt Level0 IDENT Register
Interrupt Level1 IDENT Register
Interrupt Level2 IDENT Register
Interrupt Level3 IDENT Register
CPU Interrupt Mask Register
Mailbox Pointer Register
Reserved for private transactions
Interprocessor Interrupt Register
I/O Interrupt Register 4
I/O Interrupt Register 5
I/O Interrupt Register 6
I/O Interrupt Register 7
I/O Interrupt Register 8
Window Space Decr Queue Counter Reg 4
Window Space Decr Queue Counter Reg 5
Window Space Decr Queue Counter Reg 6
Window Space Decr Queue Counter Reg 7
Window Space Decr Queue Counter Reg 8
Mem Channel Decr Queue Counter Reg X
Mem Channel Decr Queue Counter Reg 8
CSR Read Data Return Data Register
CSR Read Data Return Error Register
Memory Control Register
BB+0000
BB+0040
BB+0080
BB+00C0
BB+0200
BB+0240
BB+0280
BB+02C0
BB+0300
BB+0340
BB+0380
BB+03C0
BB+0600
BB+0640
BB+0680
BB+06C0
BB+0700
BB+0740
BB+0A00
BB+0A40
BB+0A80
BB+0AC0
BB+0B00
BB+0C00
1
BSB+0000
BSB+0040
BSB+0100
BSB+0140
BSB+0180
BSB+01C0
BSB+0200
BSB+0400
BSB+0440
BSB+0480
BSB+04C0
BSB+0500
BSB+0600
BSB+0640
BSB+0800
BSB+0840
BSB+1880
CPU, Mem, I/O
CPU, Mem, I/O
CPU, Mem, I/O
CPU, Mem
CPU, I/O
CPU, I/O
CPU, I/O
CPU, I/O
CPU, I/O
CPU, I/O
CPU, I/O
CPU, I/O
Mem, I/O
Mem, I/O
CPU, Mem, I/O
CPU, Mem, I/O
CPU, Mem, I/O
CPU, Mem, I/O
I/O
I/O
I/O
I/O
I/O
I/O
None
2
CPU
CPU
CPU
CPU
CPU
CPU
CPU
CPU
CPU
CPU
CPU
CPU, I/O
CPU, I/O
CPU
CPU
Memory
1
Virtual CPU ID asserted on TLSB_BANK_NUM<3:0> to select one of 16 actual registers.
2
Data not to be recorded by another node.