Specifications

I/O Port 6-67
If the I/O port detects a hard internal error. it sets the appropriate error
bit in either the ICCNSE register or one of the IDPNSEn registers, which-
ever is applicable. The I/O port then posts an IPL 17 error interrupt to the
processor(s) to inform the operating system of the error if interrupts are
enabled (ICCNSE<INTR_NSES> set). The action taken on this type of er-
ror is determined by the operating system.
The following errors leave the I/O port in an Unpredictable state. If any of
these errors occurs, the I/O port should be reset (node reset) to initialize it
to a predictable state.
ICCNSE<UP_HDR_IE>
ICCNSE<ICR_UP_VRTX_ERROR>
ICCNSE<DN_VRTX_ERROR>
IDPNSE<IDR_UP_VRTX_ERROR>
6.7.5 Error Reporting
The I/O port uses two methods to report errors to the system.
All nonfatal errors detected by the I/O port are reported to the system by
an IPL 17 interrupt, that is, by a CSR write to broadcast space. Error re-
porting by this method can be enabled by software writing to ICC-
NSE<INTR_NSES>. Fatal errors are reported to the system by the asser-
tion of TLSB_FAULT.
Most TLSB-detected errors are also broadcast onto the TLSB through one
of the two TLSB error signals, TLSB_DATA_ERROR and TLSB_FAULT.
Reporting of soft TLSB errors, CWECC and CRECC, can be disabled by
software writing to TLCNR<CWDD> and TLCNR<CRDD>, respectively.
Broadcasting of hard and fatal TLSB errors cannot be disabled.
The I/O port monitors the error signals to latch status relative to the error
and to determine if any error was detected by another node. If the I/O port
detects an error, it asserts the appropriate TLSB error signal to notify
other nodes monitoring the TLSB that it has detected an error.
6.7.5.1 TLSB_DATA_ERROR
The I/O port uses the TLSB_DATA_ERROR signal to broadcast the detec-
tion of the following error conditions on the TLSB data bus.
• Correctable Read ECC Error
• Correctable Write ECC Error
• Uncorrectable ECC Error
Details of these error conditions are given in the description of the
TLESRn registers.
The assertion of TLSB_DATA_ERROR on correctable ECC errors, CRECC
and CWECC, can be disabled by setting TLCNR<CRDD> and TL-
CNR<CWDD>, respectively. The assertion of TLSB_DATA_ERROR for
uncorrectable ECC errors cannot be disabled.
The I/O port only checks the data bus for correctness when it is a partici-
pant in the transaction, either as a transmitter of data or a receiver of
data.