Specifications

6-66 I/O Port
6.7 I/O Port Error Handling
The I/O port provides a high reliability electrical environment. Conse-
quently, error handling is biased toward detection rather than correction.
The I/O port attempts to retain state for system software to determine the
severity level and recoverability of any error. However, due to the deep
pipelined nature of the protocol, the amount of state saved is limited.
The I/O port does not detect errors due to multiple error occurrences. The
only exception is the data bus ECC. The I/O port corrects single-bit errors,
and detects double-bit and some multiple-bit errors.
For error handling, the I/O port divides errors into four categories:
• Soft TLSB errors (recovered by hardware)
• Hard TLSB errors
• System fatal errors
• Hard internal I/O port errors
6.7.1 Soft TLSB Errors Recovered by Hardware
The I/O port can recover from this class of errors. The I/O port posts an
error interrupt to the processor(s) to inform the operating system of the er-
ror, if soft error reporting is enabled. An example of this class of errors is a
single-bit error in a data field that is ECC protected. The I/O port hard-
ware recovers from this type of error by ECC correction logic.
6.7.2 Hard TLSB Errors
This class of errors occurs when the I/O port detects a hard TLSB error
and the error does not compromise the integrity of the system bus or other
transactions. An example is an ECC double-bit error. This error does not
impact other transactions taking place on the bus. The I/O port posts an
error interrupt to the processor(s) to inform the operating system of the er-
ror. The action taken on this type of error is determined by the operating
system.
6.7.3 System Fatal Errors
This class of errors occurs when the I/O port detects a hard TLSB error
that cannot be fixed by the I/O port hardware and results in a hung bus or
loss of system bus integrity, such as a sequence error. When the I/O port
detects an error of this type it asserts TLSB_FAULT. This signal causes
all bus interfaces to reset to a known state and abort all outstanding trans-
actions. Because outstanding transactions are lost, the system integrity
has been compromised. However, the I/O port preserves all CSRs.
6.7.4 Hard Internal I/O Port Errors
This class of errors occurs when the I/O port detects a hard error internal
to the I/O port and the error does not compromise the integrity of the sys-
tem bus or other transactions. An example is an up HDR internal error.
This error does not impact transactions taking place on the TLSB bus.