Specifications

Memory Subsystem 4-13
four memory modules, with at least two strings each, supports a maximum
of 8-way interleaving.
4.3.2 Memory Organization
The physical memory composed of a single or multiple memory modules
can be organized in various ways to optimize memory access.
Memory can be configured with MS7CC modules of various capacities,
from 128 Mbytes to 2 Gbytes. The DRAM arrays consist of DRAMs, con-
trol signals, and address buffer components. The memory modules can use
DRAM sizes of 4 Mbits or 16 Mbits. The DRAM arrays are organized into
1 to 8 strings. Each string requires 144 DRAMs (using 1M x 4 or 4M x 4
DRAMs). Table 4-5 lists array capacities that can be configured based
upon the number of strings on a module and the DRAM type.
Table 4-5 Memory Array Capacity
DRAM arrays on all memory modules containing more than one string are
organized as two banks, Bank 0 and Bank 1. A bank is a grouping of one
or more strings that share a common address path. Each bank has its own
set of control, address, and timing signals and is accessible independently.
This arrangement prevents memory idling by allowing access to the second
bank while the first bank is busy.
Memory performance is improved by interleaving the physical memory.
Interleaving can be done at two levels: module and system.
Each memory module supports 2-way interleaving. Figure 4-5 shows a 2-
way interleaved, 2-string memory module.
DRAM Type
(Mbits)
Number of
Strings
Memory Capacity
(Mbytes)
4
4
4
16
16
2
4
8
4
8
128
256
512
1024
2048