User`s manual
The
PDP-II
memory
is
organized
into 16-bit
words
consisting
of
two 8-bit bytes. Each byte is
addressable
and
has
its
own
address location:
low
bytes
are
even-
numbered,
high bytes
are
odd-numbered.
Words
are
addressed
at
even-numbered
locations
only
and
the
high
(odd)
byte
of
a
word
is
automatically
included
to
provide
a 16-bit word.
Consecutive
words
are
there-
fore
found
in
even-numbered
addresses. A byte oper-
ation
addresses
an
odd
or
even location
to
select
an
8-
bit byte.
The U
nibu~
address wurd \.:onlains
18
bits identified
as A( 17:00). These
18
bits provide the
capability
of
addressing 256K
memory
locations, each
of
which IS
an
8-bit byte.
This
also represents 128K 16-bit words.
In this discussion,
the
mUltiplier K
equals
1024
so
that
256K represents 262, 144 locations
and
238K rep-
resents 131,072 locations.
This
maximum
memory
size can
be
used only by a
PDP-II
processor with a
Memory
Management
Unit
that
utilizes all
18
address
bits.
Without
this unit,
the
processor
pro-
vides
16
address
bits which limits
the
maximum
mem-
ory size
to
64K (65,536) bytes
or
32K
(32,768) words.
Figure
A-I shows the
organization
for the
maximum
memory
size
of
256K bytes. In the binary system,
18
bits
can
specify 218
or
262,144 (256K) locations.
The
octal
numbering
system
is
used
to
designate the
address.
This
provides convenience in converting
the
address
to
the
binary
system
that
the
processor uses,
as
shown
below.
17
16 15
14
13
12
11
10
09
08
0 0
1
0
0
,
1
1
,
1
.A
A
7
APPENDIX A
PDP-II
lVlElVlORY
ORGANIZATION
..
~ND
A.DDRESSING
CONVENTIONS
The
highest
8K
address
locations
(760000-777777)
are
reserved for internal general registers
and
per-
ipheral devices.
There
is no physical
memory
for
these addresses; only
the
numbers
are reserved. As a
result,
programmable
memory
locations
cannot
be
assigned
in
this area; therefore,
the
user
has
248K
bytes
or
124K
words
to
program.
A
PDP-II
processor
without
the
Memory
Manage-
ment U nit provides
16
address bits that specify
2it.
or65,536 (64K) locations
(Figure
A-2).
The
max-
Imum
memory
sIze IS 65,536 (64K) bytes
or
32,768
(32K) words. Logic in
the
processor forces
address
bits A(
17:
16)
to
1 s
if
bits A(
15:
13)
are
all Is, when
the
processor
is
master, to allow generation
of
addresses
in
the
reserved
area
with only 16-bit
control.
Bits 13,
14,
and
15
become
all I s first
at
octal 160000
which
is
decimal 57,344 (56K).
This
is
the
beginning
of
the
last
8K
bytes
of
the
64K
byte
memory.
The
processor
converts
locations
160000-177777
to
760000-777777, which relocates these last
8K
bytes
(4K words)
to
the
highest locations accessible
by
the
bus. These
are
the
locations
that
are
reserved for
internal
general
register
and
peripheral
device
addresses; therefore, the user has 57,344 (56K) bytes
or
28,672 (28K)
words
to
program.
07
06 05
04
1
0 0
0
A
6
o
03
02
01
0
0
1
A
00
0
ADDRESS
BIT
BINARY
OCTAL
11-3176
A-I