User`s manual

1. SET PRlt"CIPAL
XMIT REGS
WITH
HEADER
BUFFER AD·
DRESS
& B.C.
2. SET BIT TO
SEND
BCC
WHEN
B.C.-O
1. SEND BUFFER
2. SET BIT TO
SEND
BCC
WHEN
B.C."O
SEND
BUFFER
11·2951
Figure 3-7 D DCM P Transmission Flow Diagram
3-48
3.6.5.2 Reception Control - Figure 3-8 is a flow
chart for the DDCMP reception process. Initially,
the DV II receive registers are set to receive the six
bytes
of the incoming DDCMP header and bit 15 of
the byte count register is cleared to direct reception of
the BCe.
The first character in the first buffer is now examined
to determine message type. If it is a numbered data
message (SOH character) or a bootstrap message
(DLE character), the character count in buffer words
two and three is used to build a receive buffer of
appropriate size. If it is an unnumbered control mes-
sage
(ENQ character), no additional buffering is
required.
When the DV II interrupts to signal BCC reception
complete, set the DVII receive registers to input the
data to the receive buffer that has just been built, if
any. On the next interrupt, return control to the call-
ing
program.
The BCC is checked at the points indicated in Figure
3-8. The BCC Received interrupt occurs as a result of
a control byte directive or a marked byte count reach-
ing zero.
The BCC characters are included in the
BCC. The accumulated BCC, if correct, should be
zero.