User`s manual
3.5
DVll
INITIALIZATION
DV II initialization consists
of
setting
up
the
DVII
line
modems
and
the
DVII
Data
Transfer
Section.
3.5.1 Line Modem Set-Up
I nitialization for
the
line
modems
consists
of
setting
the line
number
for
the
modem
to
be
enabled
in
CSR
00-03.
CSR
06
(Interrupt
Enable)
may
also
be
set
to
one
at
this time to select the
interrupt
mode.
The
Line
Enable
bit
(LSR
00)
is
then
set
to
one
to
compiete
the
initialization process for
the
selected line.
The
process
is repeated for each line
that
is
to
be enabled.
CSR
and
LSR
are
cleared
at
bus
initialization time.
Setting
CSR
10
and
II
(Clear
Mux
and
Clear
Scan)
each
to
one
is
equivalent
to
bus
initialization, except
that
the Terminal
Ready
bits
(LSR
01) for each line
are also cleared by
Clear
M ux.
If
a
Clear
Scan is
issued, the
PDP-II
program
must
wait
for
the
MCV
Busy
Indicator
(CSR
04)
to
return
to
zero before
sending additional
command
bits.
3.5.2
DVU
Data
Transfer Setup
The
primary
registers should be cleared by a
Master
Clear
(SCR
i
i),
then
the secondary registers for ali
lines must be cleared.
Then
set
Microprocessor
GO
(SCR
00).
The
Microprocessor will now
loop
in
an
idle mode.
The
first
word
to
SCR
may
also
contain
the extended address bits
(SCR
04-05)
and
interrupt
enables
(SCR
06, 12, 13), as required.
Following
is
an
illustrative
procedure
to
setup
a line
for
data
reception:
l.
2.
Set the receiver
control
table
core
memory
address
and
the byte
count
in
the
appro-
priate
secondary
registers.
Set the required
protocol
control
bits in
the Line Protocol
Parameters
secondary
register.
3.
Initialize receiver
mode
to
non-zero
in
Receiver
Mode
Bits
secondary
register
(1101) if required by
the
receiver
protocol
implementation
logic.
4. When the
data
link is established
on
the
selected line
(Paragraph
3.5.1), set
LRC
13
and
15
to
one
to
cause
the
line
to
sync
up
and
start
receiving characters. Set
LRC
IO
to
one
at
the
same
time
if
sync
charac-
ter(s) B
is
to
be selected.
3-41
LCR
10
and
13
are implemented for syn-
chronous
reception
on
a line.
When
oper-
ating
on
an
asynchronous
line,
character
format
and
baud
rate
must
be set
up
at
this time.
Following is
an
illustrative
procedure
to
setup
a line
for transmission:
i.
Set the
transmitter
control
table
core
memory
addresses
and
byte
counts
in the
appropriate
principal
and
alternate
sec-
ondary
registers, setting bit
15
of
the
byte
counts
to
zero
if
marked
byte
counts
are
required by the protocol.
2.
Set the required
protocol
control
bits
and
the
DLE
character
in the Line
Protocol
Parameters
secondary
register.
3.
Initialize
transmitter
mode
to
non-zero
in
Transmitter
Mode
Bits
secondary
register
(1100) if required by
the
protocol;
set
oth-
er
bits in this register
as
required by the
protocoL
4. Set bit
07
of
Line State
secondary
register
to
one
if
transmission
is
to
start
from
the
alternate
tables.
5.
If
the
data
link
is
established
on
the
selected line, set bit 02
of
Line
State
sec-
ondary
register
to
one
to
start
the
trans-
mitter for the line.
If the line
is
asynchronous,
the
character
format
and
baud
rate
in
the
Line
Control
register
must
be
setup
prior
to
setting Line
State
bit 02.
3.6 DATA
TRANSFER
IMPLEMENTATION
With the DV II initialized as discussed in Section 3.5,
calls
to
or
from
remote
modems
may
be
originated
or
answered
and
DV
II
data
transfers
started
by
the
PDP-II
program.
The
data
transfer
process
or
pro=
tocol
is
controlled
by
the
contents
of
the
control
bytes
and
by the service
routines
for
the
DV11
interrupts.
This
section
contains
descriptions
of
call
origination
and
answering procedures;
resynchronization
during
reception;
termination
of
transmission
and
reception;
and
suggested
programming
methods
for
implement-
ing
BISYNC
and
DDCMP
protocols.