User`s manual
Table
3-11
(Cont)
Line State Secondary Register Bit Assignments
Bit(s) Designation
Function Read/Write
04
Transmitter Non-
Set to one by the Microprocessor whenever a non-
Read or Write
Existen t Memory (NXM)
existent memory condition
is
encountered during
zero
transmission (NPR
Status Register interrupt codes
0000,0010,1000).
The PDP-II program should
read the NPR
Status Register, then clear this bit.
This bit clears Transmitter Go (Line
State
02)
when
set
to
one.
05
Transmitter Memory
Set to one by the Microprocessor whenever a memory
Read or Write
Parity Error
parity error
is
encountered during transmission (NPR
zero
Status Register interrupt code 1000). The PDP-II
program should read the NPR
Status Register, then
clear this bit. This bit clears Transmitter Go
(line
State
02)
when set
to
one.
06
Sync Strip On
Set
to
one by the Microprocessor in response to Strip
Read only
Leading
Syncs command bit (Line Protocol Parameters
01)
from PDP-II program to the associated line. Causes
the Microprocessor to strip from the incoming da ta
stream all sync characters arriving after the achievement
of
synchronization,
but
before the first non-sync charac-
ter. Set to zero by the Microprocessor
on
arrival
of
the
first non-sync character.
07
Use
Alternate Tables
When set
to
zero by the PDP-II program or the Micro-
Read or Write
processor, causes the Microprocessor to extract data
for transmission
on
the associated line from the princi-
pal tables. When set to one by the PDP-II program
or
the Microprocessor, causes the Microprocessor
to
extract the transmit data from the alternate tables. Set
to zero by the Microprocessor when the alternate byte
count
is
equal to zero. Set to one by the Microprocessor
when the principal byte
count
is
equal
to
zero.
08-09
Unused
I
10
Expect
Bee
When a marked receiver byte count reaches zero, this
I
Read or Write
bit
is
examined by the Microprocessor. If this bit has
been set to one by the PDP-II program, the Micro-
processor interprets the next received character (in
the case
of
LRC-8 block check types) or the next two
received characters (in the case
of
CRC-16 and
CRC-CCITT block check types)
as
block check
character(s), and passes them through the
BCC
calculation logic. The Microprocessor then places the
OR
of
the high and low bytes
of
the accumulated BCe
into the RIC register with the line number and interrupt
code
0101. A control byte with bit
04
set to one
(character discard)
is
written into the Control Byte
secondary register to inhibit storage
of
the block check
character(s), and
SCR
07
is
set to one to interrupt the
program.
3-36