User`s manual

CONTENTS (Cont)
APPENDIX A PDP-II MEMORY ORGANIZATION AND ADDRESSING CONVENTIONS
APPENDIX
B PROTOCOLS FOR BINARY SYNCHRONOUS COMMUNICATIONS
APPENDIX C GLOSSARY OF TERMS AND ABBREvlA nONS
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ILLUSTRATIONS
DVll Overview Block Diagram
DV
11 Communications Multiplexer
DVll Interconnection Diagram
Module
Utilization Diagram
Title
DVll M7836 Module - Device Address Selection Switches
DVll M7837 Module - Interrupt Vector Address Selection
Switches for DVll Data Handling Section ........ .
DVll M7807 Module - Device Address Selection Jumpers
and
Interrupt Vector Address Selection Jumpers for DVll
Modem Control Unit .. . . . . . . . . . . . . . . . . . .
Location
of Sync Switches on M7839 Module ...... .
Distribution Panel and Test
Connector Jumper Configuration
Control Byte Address
Control Byte Formats
DV
11 Primary Registers
DVl1 Secondary Registers
BISYNC Transmission Flow Diagram
BISYNC Reception Flow Diagram .
DDCMP Transmission Flow Diagram
DDCMP Reception Flow Diagram
TABLES
Title
Reference Documents
EIA Electrical Specifications
Device Address
Switches ..
Vector Address Switches for Data Handling Section
Vector Address Jumpers for Modem Control Unit
Synchronous Parameter Selection Switches
Functions of DVII Programmable Registers
System Control Register Bit Assignments
Line
Control Register Bit ASSignments
(For Synchronous Line Cards) .....
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